AT32UC3B1256-AUT Atmel, AT32UC3B1256-AUT Datasheet - Page 369
![IC MCU AVR32 256KB FLASH 48-TQFP](/photos/6/82/68248/313-48-vqfp_sml.jpg)
AT32UC3B1256-AUT
Manufacturer Part Number
AT32UC3B1256-AUT
Description
IC MCU AVR32 256KB FLASH 48-TQFP
Manufacturer
Atmel
Series
AVR®32 UC3r
Specifications of AT32UC3B1256-AUT
Core Processor
AVR
Core Size
32-Bit
Speed
60MHz
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
28
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TQFP, 48-VQFP
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
28
Number Of Timers
3
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1101
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
AVR UC3
No. Of I/o's
28
Ram Memory Size
32KB
Cpu Speed
60MHz
No. Of Timers
1
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP48 - STK600 SOCKET/ADAPTER 48-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1101 - KIT DEV/EVAL FOR AVR32 AT32UC3B
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3B1256-AUT
Manufacturer:
ATMEL
Quantity:
1 000
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- Download datasheet (11Mb)
22.7
22.7.1
22.7.1.1
22.7.1.2
32059K–03/2011
Functional Description
USB General Operation
Introduction
Power-On and reset
After a hardware reset, the USBB is disabled. When enabled, the USBB runs either in device
mode or in host mode according to the ID detection.
If the USB_ID pin is not connected to ground, the USB_ID Pin State bit in the General Status
register (USBSTA.ID) is set (the internal pull-up resistor of the USB_ID pin must be enabled by
the I/O Controller) and device mode is engaged.
The USBSTA.ID bit is cleared when a low level has been detected on the USB_ID pin. Host
mode is then engaged.
Figure 22-5 on page 369
Figure 22-5. General States
After a hardware reset, the USBB is in the Reset state. In this state:
• The macro is disabled. The USBB Enable bit in the General Control register
• The macro clock is stopped in order to minimize power consumption. The Freeze USB Clock
• The pad is in suspend mode.
• The internal states and registers of the device and host modes are reset.
• The DPRAM is not cleared and is accessible.
• The USBSTA.ID bit and the VBus Level bit in the UBSTA (UBSTA.VBUS) reflect the states of
• The OTG Pad Enable (OTGPADE) bit, the VBus Polarity (VBUSPO) bit, the FRZCLK bit, the
(USBCON.USBE) is zero.
bit in USBCON (USBON.FRZCLK) is set.
the USB_ID and USB_VBUS input pins.
USBE bit, the USB_ID Pin Enable (UIDE) bit, the USBB Mode (UIMOD) bit in USBCON, and
the Low-Speed Mode Force bit in the Device General Control (UDCON.LS) register can be
written by software, so that the user can program pads and speed before enabling the macro,
but their value is only taken into account once the macro is enabled and unfrozen.
describes the USBB main states.
Clock stopped:
FRZCLK = 1
Device
Macro off:
USBE = 0
USBE = 1
ID = 1
USBE = 0
Reset
USBE = 1
ID = 0
USBE = 0
USBE = 0
Host
RESET
HW
<any
other
state>
AT32UC3B
369
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