PIC18F2685-I/SO Microchip Technology, PIC18F2685-I/SO Datasheet - Page 257
![IC PIC MCU FLASH 48KX16 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F2685-I/SO
Manufacturer Part Number
PIC18F2685-I/SO
Description
IC PIC MCU FLASH 48KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PCM18XT0.pdf
(484 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F2682-ISP.pdf
(6 pages)
4.PIC18F2682-ISP.pdf
(4 pages)
Specifications of PIC18F2685-I/SO
Program Memory Type
FLASH
Program Memory Size
96KB (48K x 16)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.25 KB
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
28
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PCM18XT0 PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2682-ISP PDF datasheet #3
- PIC18F2682-ISP PDF datasheet #4
- Current page: 257 of 484
- Download datasheet (9Mb)
19.6
Figure 19-3 shows the operation of the A/D converter
after the GO/DONE bit has been set and the
ACQT2:ACQT0 bits are cleared. A conversion is
started after the following instruction to allow entry into
Sleep mode before the conversion begins.
Figure 19-4 shows the operation of the A/D converter
after
ACQT2:ACQT0 bits are set to ‘010’ and a 4 T
acquisition time is selected before the conversion
starts.
FIGURE 19-3:
FIGURE 19-4:
© 2009 Microchip Technology Inc.
(Holding capacitor continues
acquiring input)
Set GO/DONE bit
the
T
CY
Set GO/DONE bit
A/D Conversions
Holding capacitor is disconnected from analog input (typically 100 ns)
1
- T
GO/DONE
T
AD
ACQT
Acquisition
Conversion starts
Automatic
2
T
Time
AD
Cycles
1 T
A/D CONVERSION T
A/D CONVERSION T
3
AD
b9
bit
2 T
4
has
AD
b8
Conversion starts
(Holding capacitor is disconnected)
3 T
1
been
AD
b7
4 T
b9
2
set,
PIC18F2682/2685/4682/4685
AD
b6
AD
AD
5 T
On the following cycle:
ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
On the following cycle:
ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
ADIF bit is set, holding capacitor is connected to analog input.
b8
3
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
the
AD
AD
b5
6 T
b7
4
AD
b4
7 T
T
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the
last
registers).
After the A/D conversion is completed or aborted, a
2 T
be started. After this wait, acquisition on the selected
channel is automatically started.
5
b6
AD
AD
Note:
b3
AD
Cycles
8
b5
wait is required before the next acquisition can
value
6
conversion
T
AD
b2
9 T
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
b4
7
written
AD
b1
10
b3
8
T
AD
sample.
ACQ
b0
ACQ
11
to
b2
9
= 0)
= 4 T
the
10
This
b1
AD
ADRESH:ADRESL
DS39761C-page 257
)
b0
11
means
the
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