PIC17C44-25/PQ Microchip Technology, PIC17C44-25/PQ Datasheet - Page 124
![IC MCU OTP 8KX16 PWM 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC17C44-25/PQ
Manufacturer Part Number
PIC17C44-25/PQ
Description
IC MCU OTP 8KX16 PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 17Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC17C42A-16P.pdf
(241 pages)
3.PIC17C44-16L.pdf
(4 pages)
Specifications of PIC17C44-25/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (8K x 16)
Program Memory Type
OTP
Ram Size
454 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-MQFP, 44-PQFP
For Use With
AC164316 - MODULE SKT MPLAB PM3 44MQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC17C44-25/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC17C4X
INFSNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
If skip:
Example:
DS30412C-page 124
Before Instruction
After Instruction
Forced NOP
Decode
REG
REG
If REG
If REG
Q1
Q1
PC =
PC =
=
=
=
=
register 'f'
Increment f, skip if not 0
[ label ]
0
d
(f) + 1
The contents of register 'f' are incre-
mented. If 'd' is 0 the result is placed in
WREG. If 'd' is 1 the result is placed
back in register 'f'.
If the result is not 0, the next instruction,
which is already fetched, is discarded,
and an NOP is executed instead making
it a two-cycle instruction.
1
1(2)
HERE
ZERO
NZERO
None
Read
NOP
0010
Q2
Q2
REG
REG + 1
1;
Address (ZERO)
0;
Address (NZERO)
f
[0,1]
255
INFSNZ f,d
(dest), skip if not 0
INFSNZ
010d
Execute
Execute
Q3
Q3
REG, 1
ffff
destination
Write to
NOP
Q4
Q4
ffff
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
WREG
WREG
Q1
=
=
Inclusive OR Literal with WREG
[ label ]
0
(WREG) .OR. (k)
Z
The contents of WREG are OR’ed with
the eight bit literal 'k'. The result is
placed in WREG.
1
1
IORLW
literal 'k'
Read
1011
Q2
0x9A
0xBF
k
1996 Microchip Technology Inc.
255
IORLW k
0011
0x35
Execute
Q3
kkkk
(WREG)
Write to
WREG
Q4
kkkk
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