DSPIC30F6015-20E/PT Microchip Technology, DSPIC30F6015-20E/PT Datasheet
DSPIC30F6015-20E/PT
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DSPIC30F6015-20E/PT Summary of contents
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... Microchip corporate web site (www.microchip.com). TABLE 1: SILICON DEVREV VALUES Part Number dsPIC30F6010A dsPIC30F6015 Note 1: The Device and Revision IDs (DEVID and DEVREV) are located at the last two implemented addresses in program memory. 2: Refer to the “dsPIC30F Flash Programming Specification” (DS70102) for detailed information on Device and Revision IDs for your specific device. © ...
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... When the I C module is configured as a 10-bit slave with an address of 0x102, the I2CxRCV register content for the lower address byte is 0x01 rather than 0x02. Affected (1) Revisions devices, the © 2010 Microchip Technology Inc. ...
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... Current 22. Consumption in Sleep Mode Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. dsPIC30F6010A/6015 Issue Summary 2 When the I C module is enabled, the dsPIC generates a glitch on the SDA and SCL pins, causing a false communication start in a single-master configuration or a bus collision in a multi-master configuration ...
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... Load a value greater than ‘0’ to the OCxRS register when operating in PWM mode. In this case duty cycle is achievable the application requires 0% duty cycles, the output compare module disabled for 0% duty cycles, and re-enabled for non-zero percent duty cycles. Affected Silicon Revisions © 2010 Microchip Technology Inc can be ...
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... Affected Silicon Revisions © 2010 Microchip Technology Inc. dsPIC30F6010A/6015 5. Module: ADC ADC event triggers from the INT0 pin will not wake-up the device from Sleep mode if the SMPI bits are non-zero. This means that if the ADC is configured to generate an interrupt after a certain ...
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... A/D Channels Configuration REF REF CH X ANx S/H ADC REF REF ANx S/H ADC ANx REF REF REF ANx S/H ADC ANx REF © 2010 Microchip Technology Inc. ...
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... User's code } void __attribute__((__interrupt__)) _QEIInterrupt(void) { IFSxbits.QEIIF = 0; POSCNT_b15 ^= 0x8000; // Overflow or Underflow } © 2010 Microchip Technology Inc. dsPIC30F6010A/6015 Work around To prevent this condition from occurring, set MAXCNT to 0x7FFF, which will cause an interrupt to be generated by the QEI module. In addition, a global variable could be used to keep ...
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... GotoSleep( ) function call. This ensures that the device continues executing the correct code sequence after waking up from Sleep mode. Example 2 described above. ; Ensure flag is reset ; Return from Interrupt Service Routine the function call would be demonstrates the work around © 2010 Microchip Technology Inc. ...
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... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2010 Microchip Technology Inc. dsPIC30F6010A/6015 Work around 3: Instead of executing a PWRSAV #0 instruction to put the device into Sleep mode, perform a clock switch to the 32 kHz Low-Power (LP) Oscillator with a 64:1 postscaler mode ...
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... If the PTDIR bit is set (when PTMR is counting down), and the CPU execution is halted (after a breakpoint is reached), PTMR will start counting PTDIR was zero. Work around None. Affected Silicon Revisions © 2010 Microchip Technology Inc slave interrupt 2 C nodes receive 2 C data 2 C nodes. This ...
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... Affected Silicon Revisions © 2010 Microchip Technology Inc. dsPIC30F6010A/6015 14. Module: PLL The PLL LOCK Status bit (OSCCON<5>) can occasionally get cleared and generate an oscillator failure trap even when the PLL is still locked and functioning correctly. Work around The user application must include an oscillator failure trap service routine ...
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... C bus, and can cause 2 C module are set to values ‘1’ and 2 C module and the first data 2 C masters should be synchro module to be initialized 2 C module is with other modules that have 2 C module module © 2010 Microchip Technology Inc. ...
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... QEI in Timer Gated Accumulation mode, initialize MAXCNT = 0. Affected Silicon Revisions © 2010 Microchip Technology Inc. dsPIC30F6010A/6015 22. Module: ADC If the ADC module enabled state when the device enters Sleep mode as a result of executing a PWRSAV #0 instruction, the device power-down current (I ) may exceed the specifications listed PD in the device data sheet ...
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... Standard Operating Conditions: 3.3V and 5.0V (±10%) (unless otherwise stated) Operating temperature Min Typ Max V — 0.8 SS 2.1 — -40°C ≤ T ≤ +85°C for Industrial A -40°C ≤ T ≤ +125°C for Extended A Units Conditions V SMbus enabled V SMbus enabled © 2010 Microchip Technology Inc. ...
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... DS80400, “dsPIC30F6010A/6015 Rev. A4 Silicon Errata” Rev B Document (8/2009) Added silicon issues 20 (QEI) and 21 (QEI). Rev C Document (6/2010) Added silicon issues 22 (ADC) and data sheet clarification 1 (DC Characteristics: I/O Pin Input Specifications). © 2010 Microchip Technology Inc. dsPIC30F6010A/6015 2 C), 13 (Timer and 19 DS80458C-page 15 ...
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... NOTES: DS80458C-page 16 © 2010 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2010 Microchip Technology Inc. 01/05/10 ...