AT90CAN64-16AU Atmel, AT90CAN64-16AU Datasheet - Page 232

IC MCU AVR 64K FLASH 64-TQFP

AT90CAN64-16AU

Manufacturer Part Number
AT90CAN64-16AU
Description
IC MCU AVR 64K FLASH 64-TQFP
Manufacturer
Atmel
Series
AVR® 90CANr
Datasheets

Specifications of AT90CAN64-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Device Core
AVR
Family Name
90C
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
53
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
4
Processor Series
AT90CANx
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
Minimum Operating Temperature
- 40 C
Controller Family/series
AVR CAN
No. Of I/o's
53
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
Cpu Family
90C
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
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Atmel
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18.9
232
Multi-master Systems and Arbitration
AT90CAN32/64/128
If multiple masters are connected to the same bus, transmissions may be initiated simulta-
neously by one or more of them. The TWI standard ensures that such situations are handled in
such a way that one of the masters will be allowed to proceed with the transfer, and that no data
will be lost in the process. An example of an arbitration situation is depicted below, where two
masters are trying to transmit data to a slave receiver.
Figure 18-20. An Arbitration Example
Several different scenarios may arise during arbitration, as described below:
• Two or more masters are performing identical communication with the same slave. In this
• Two or more masters are accessing the same slave with different data or direction bit. In this
• Two or more masters are accessing different slaves. In this case, arbitration will occur in the
case, neither the slave nor any of the masters will know about the bus contention.
case, arbitration will occur, either in the READ/WRITE bit or in the data bits. The masters
trying to output a one on SDA while another master outputs a zero will lose the arbitration.
Losing masters will switch to not addressed slave mode or wait until the bus is free and
transmit a new START condition, depending on application software action.
SLA bits. Masters trying to output a one on SDA while another master outputs a zero will lose
the arbitration. Masters losing arbitration in SLA will switch to slave mode to check if they are
being addressed by the winning master. If addressed, they will switch to SR or ST mode,
depending on the value of the READ/WRITE bit. If they are not being addressed, they will
switch to not addressed slave mode or wait until the bus is free and transmit a new START
condition, depending on application software action.
SDA
SCL
TRANSMITTER
Device 1
MASTER
Device 2
RECEIVER
SLAVE
Device 3
RECEIVER
SLAVE
........
Device n
R1
7679H–CAN–08/08
V
CC
R2

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