PIC16F877-04E/PQ Microchip Technology, PIC16F877-04E/PQ Datasheet - Page 379
![IC MCU FLASH 8KX14 EE 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC16F877-04E/PQ
Manufacturer Part Number
PIC16F877-04E/PQ
Description
IC MCU FLASH 8KX14 EE 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873-04SO.pdf
(218 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F877-04E/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F87704E/PQ
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F877-04E/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873-04SO PDF datasheet #4
- PIC16F873-04SO PDF datasheet #5
- PIC16F873-04SO PDF datasheet #6
- Current page: 379 of 688
- Download datasheet (3Mb)
20.8
20.9
20.10
1997 Microchip Technology Inc.
Comparator Interrupts
Comparator Operation During SLEEP
Effects of a RESET
The comparator interrupt flag is set whenever the comparators value changes relative to the last
value loaded into CMxOUT bits. Software will need to maintain information about the status of
the output bits, as read from CMCON<7:6>, to determine the actual change that has occurred.
The CMIF bit, is the comparator interrupt flag. The CMIF bit must be cleared. Since it is also pos-
sible to set this bit, a simulated interrupt may be initiated.
The CMIE bit and the PEIE bit (INTCON<6>) must be set to enable the interrupt. In addition, the
GIE bit must also be set. If any of these bits are clear, the interrupt is not enabled, though the
CMIF bit will still be set if an interrupt condition occurs.
The user, in the interrupt service routine, can clear the interrupt in the following manner:
a)
b)
An interrupt condition will continue to set the CMIF flag bit. Reading CMCON will end the interrupt
condition, and allow the CMIF flag bit to be cleared.
When a comparator is active and the device is placed in SLEEP mode, the comparator remains
active and the interrupt is functional if enabled. This interrupt will wake up the device from SLEEP
mode when enabled. While the comparator is powered-up, each comparator that is operational
will consume additional current as shown in the comparator specifications. To minimize power
consumption while in SLEEP mode, turn off the comparators, CM2:CM0 = 111, before entering
sleep. If the device wakes-up from sleep, the contents of the CMCON register are not affected.
A device reset forces the CMCON register to its reset state. This forces the comparator module
to be in the comparator reset mode, CM2:CM0 = 000. This ensures that all potential inputs are
analog inputs. Device current is minimized when analog inputs are present at reset time. The
comparators will be powered-down during the reset interval.
Any read or write of the CMCON register. This will load the CMCON register with the new
value with the CMxOUT bits.
Clear the CMIF flag bit.
Section 20. Comparator
DS31020A-page 20-9
20
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