PIC16F877-04E/PQ Microchip Technology, PIC16F877-04E/PQ Datasheet - Page 265
![IC MCU FLASH 8KX14 EE 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC16F877-04E/PQ
Manufacturer Part Number
PIC16F877-04E/PQ
Description
IC MCU FLASH 8KX14 EE 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873-04SO.pdf
(218 pages)
5.PIC16F873-04SO.pdf
(5 pages)
6.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F877-04E/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PIC16F87704E/PQ
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F877-04E/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873-04SO PDF datasheet #4
- PIC16F873-04SO PDF datasheet #5
- PIC16F873-04SO PDF datasheet #6
- Current page: 265 of 688
- Download datasheet (3Mb)
16.4
1997 Microchip Technology Inc.
SSP I
2
C Operation
The SSP module in I
and provides interrupts on start and stop bits in hardware to facilitate software implementations
of the master functions. The SSP module implements the standard and fast mode specifications
as well as 7-bit and 10-bit addressing.
Two pins are used for data transfer. These are the SCL pin, which is the clock, and the SDA pin,
which is the data. The user must configure these pins as inputs through the TRIS bits. The SSP
module functions are enabled by setting SSP Enable bit, SSPEN (SSPCON<5>).
A “glitch” filter is on the SCL and SDA pins when the pin is an input. This filter operates in both
the 100 KHz and 400 KHz modes. In the 100 KHz mode, when these pins are an output, there
is a slew rate control of the pin that is independent of device frequency.
Figure 16-7: SSP Block Diagram (I
2
C mode fully implements all slave functions, except General Call Support,
SCL
SDA
Read
clock
shift
2
Appendix A
C Mode)
MSb
Stop bit detect
Match detect
SSPADD reg
SSPBUF reg
SSPSR reg
Start and
Section 16. BSSP
gives an overview of the I
LSb
Write
(SSPSTAT reg)
data bus
Internal
Set, Reset
S, P bits
Addr Match
2
DS31016A-page 16-15
C bus specification.
16
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