PIC16LF77-I/L Microchip Technology, PIC16LF77-I/L Datasheet - Page 22
![IC PIC MCU FLASH 8KX14 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC16LF77-I/L
Manufacturer Part Number
PIC16LF77-I/L
Description
IC PIC MCU FLASH 8KX14 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF77-I/L
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
PIC16LF77I/L
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LF77-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16F7X
2.2.2.2
The OPTION_REG register is a readable and writable
register, which contains various control bits to configure
the TMR0 prescaler/WDT postscaler (single assign-
able register known also as the prescaler), the External
INT Interrupt, TMR0 and the weak pull-ups on PORTB.
REGISTER 2-2:
DS30325B-page 20
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
OPTION_REG Register
OPTION_REG REGISTER (ADDRESS 81h, 181h)
bit 7
RBPU
1 = PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of RB0/INT pin
0 = Interrupt on falling edge of RB0/INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on RA4/T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on RA4/T0CKI pin
0 = Increment on low-to-high transition on RA4/T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS2:PS0: Prescaler Rate Select bits
Legend:
R = Readable bit
- n = Value at POR reset
R/W-1
RBPU
Bit Value
:
PORTB Pull-up Enable bit
000
001
010
011
100
101
110
111
INTEDG
R/W-1
TMR0 Rate WDT Rate
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
R/W-1
T0CS
W = Writable bit
’1’ = Bit is set
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
R/W-1
T0SE
Note:
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
To achieve a 1:1 prescaler assignment for
the TMR0 register, assign the prescaler to
the Watchdog Timer.
R/W-1
PSA
R/W-1
PS2
2002 Microchip Technology Inc.
x = Bit is unknown
R/W-1
PS1
R/W-1
PS0
bit 0
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