PIC16F874-20I/PQ Microchip Technology, PIC16F874-20I/PQ Datasheet - Page 35
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PIC16F874-20I/PQ
Manufacturer Part Number
PIC16F874-20I/PQ
Description
IC MCU FLASH 4KX14 EE 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F873-04SO.pdf
(218 pages)
4.PIC16F873-04SO.pdf
(5 pages)
5.PIC16F873-04SO.pdf
(5 pages)
Specifications of PIC16F874-20I/PQ
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
44-MQFP, 44-PQFP
Controller Family/series
PIC16F
No. Of I/o's
33
Eeprom Memory Size
128Byte
Ram Memory Size
192Byte
Cpu Speed
20MHz
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
MSSP, PSP, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F874-20I/PQ
Manufacturer:
IDT
Quantity:
1 145
Company:
Part Number:
PIC16F874-20I/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
3.3
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= 0) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 3-5). PORTC pins have Schmitt Trigger input
buffers.
When the I
pins can be configured with normal I
SMBus levels by using the CKE bit (SSPSTAT<6>).
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
destination, should be avoided. The user should refer
to the corresponding peripheral section for the correct
TRIS bit settings.
FIGURE 3-5:
2001 Microchip Technology Inc.
TRIS
Note 1: I/O pins have diode protection to V
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
Port
WR
TRIS
RD
Peripheral
OE
RD
Port
Peripheral Input
(3)
2: Port/Peripheral select signal selects between port
3: Peripheral OE (output enable) is only activated if
PORTC and the TRISC Register
data and peripheral output.
peripheral select is active.
2
C module is enabled, the PORTC<4:3>
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
(2)
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<2:0>,
RC<7:5>
0
1
Q
EN
D
2
DD
Schmitt
Trigger
C levels, or with
and V
V
V
N
P
SS
DD
SS
.
I/O
pin
(1)
FIGURE 3-6:
Port/Peripheral Select
Peripheral Data Out
Data Bus
WR
Port
WR
TRIS
RD
TRIS
Peripheral
OE
RD
Port
SSPl Input
Note 1: I/O pins have diode protection to V
(3)
2: Port/Peripheral select signal selects between port data
3: Peripheral OE (output enable) is only activated if
and peripheral output.
peripheral select is active.
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
Q
Q
(2)
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE) RC<4:3>
0
1
PIC16F87X
Q
SSPSTAT<6>
CKE
EN
D
Schmitt
Trigger
DS30292C-page 33
DD
and V
Vss
1
0
V
P
N
DD
SS
Schmitt
Trigger
with
SMBus
levels
.
I/O
pin
(1)