ATMEGA325P-20MU Atmel, ATMEGA325P-20MU Datasheet - Page 79
![IC MCU AVR 32K FLASH 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATMEGA325P-20MU
Manufacturer Part Number
ATMEGA325P-20MU
Description
IC MCU AVR 32K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA3250P-20AU.pdf
(364 pages)
Specifications of ATMEGA325P-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, UART, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA325P-16MU
ATMEGA325P-16MU
ATMEGA325P-16MU
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13.3.5
8023F–AVR–07/09
Alternate Functions of Port G
Table 13-13. Overriding Signals for Alternate Functions in PF3:PF0
The alternate pin configuration is as follows:
Table 13-14. Port G Pins Alternate Functions (SEG refers to 100-pin/64-pin pinout)
Note:
The alternate pin configuration is as follows:
• RESET – Port G, Bit 5
RESET: External Reset input. When the RSTDISBL Fuse is programmed (‘0’), PG5 will function
as input with pull-up always on.
• T0 – Port G, Bit 4
T0, Timer/Counter0 Counter Source.
• T1 – Port G, Bit 3
T1, Timer/Counter1 Counter Source.
Table 13-14
shown in
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Port Pin
PG5
PG4
PG3
PG2
PG1
PG0
1. Port G, PG5 is input only. Pull-up is always on.
Figure 13-5 on page
See
and
Table 25-3 on page 272
PF3/ADC3
0
0
ADC3 INPUT
0
0
0
0
0
0
–
–
Alternate Function
RESET
T0(Timer/Counter0 Clock Input)
T1(Timer/Counter1 Clock Input)
–
–
–
Table 13-15
(1)
relates the alternate functions of Port G to the overriding signals
69.
PF2/ADC2
0
0
0
0
0
0
–
0
0
–
ADC2 INPUT
for RSTDISBL fuse.
PF1/ADC1
0
0
0
0
0
0
–
0
0
–
ADC1 INPUT
ATmega325P/3250P
PF0/ADC0
0
0
0
0
0
0
–
0
0
–
ADC0 INPUT
79
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