ATMEGA325-16AU Atmel, ATMEGA325-16AU Datasheet - Page 76

IC AVR MCU 32K 16MHZ 64TQFP

ATMEGA325-16AU

Manufacturer Part Number
ATMEGA325-16AU
Description
IC AVR MCU 32K 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA325-16AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI/UART/USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2KB
# I/os (max)
54
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
TQFP
Package
64TQFP
Family Name
ATmega
Maximum Speed
16 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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13.3.5
2570M–AVR–04/11
Alternate Functions of Port G
Table 13-13. Overriding Signals for Alternate Functions in PF3:PF0
The alternate pin configuration is as follows:
Table 13-14. Port G Pins Alternate Functions
Note:
The alternate pin configuration is as follows:
• RESET – Port G, Bit 5
RESET: External Reset input. When the RSTDISBL Fuse is programmed ('0'), PG5 will function
as input with pull-up always on.
• T0 – Port G, Bit 4
T0, Timer/Counter0 Counter Source.
• T1 – Port G, Bit 3
T1, Timer/Counter1 Counter Source.
Table 13-14
shown in
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Port Pin
PG5
PG4
PG3
PG2
PG1
PG0
1. Port G, PG5 is input only. Pull-up is always on.
Figure 13-5 on page
See
and
Table 26-3 on page 266
PF3/ADC3
0
0
0
0
0
0
0
0
ADC3 INPUT
Alternate Function
RESET
T0 (Timer/Counter0 Clock Inpu)
T1 (Timer/Counter1 Clock Input)
-
-
-
Table 13-15
(1)
relates the alternate functions of Port G to the overriding signals
66.
PF2/ADC2
0
0
0
0
0
0
0
0
ADC2 INPUT
for RSTDISBL fuse.
ATmega325/3250/645/6450
PF1/ADC1
0
0
0
0
0
0
0
0
ADC1 INPUT
PF0/ADC0
0
0
0
0
0
0
0
0
ADC0 INPUT
76

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