ATMEGA325V-8AU Atmel, ATMEGA325V-8AU Datasheet - Page 217
ATMEGA325V-8AU
Manufacturer Part Number
ATMEGA325V-8AU
Description
IC AVR MCU 32K 8MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA325V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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22.8.4
22.8.5
2570M–AVR–04/11
ADCSRB – ADC Control and Status Register B
DIDR0 – Digital Input Disable Register 0
• ADC9:0: ADC Conversion Result
These bits represent the result from the conversion, as detailed in
page
• Bit 7 – Reserved Bit
This bit is reserved for future use. To ensure compatibility with future devices, this bit must be
written to zero when ADCSRB is written.
• Bit 2:0 – ADTS2:0: ADC Auto Trigger Source
If ADATE in ADCSRA is written to one, the value of these bits selects which source will trigger
an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no effect. A conversion
will be triggered by the rising edge of the selected Interrupt Flag. Note that switching from a trig-
ger source that is cleared to a trigger source that is set, will generate a positive edge on the
trigger signal. If ADEN in ADCSRA is set, this will start a conversion. Switching to Free Running
mode (ADTS[2:0]=0) will not cause a trigger event, even if the ADC Interrupt Flag is set
Table 22-6.
• Bit 7:0 – ADC7D:ADC0D: ADC7:0 Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When an
analog signal is applied to the ADC7..0 pin and the digital input from this pin is not needed, this
bit should be written logic one to reduce power consumption in the digital input buffer.
Bit
(0x7B)
Read/Write
Initial Value
Bit
(0x7E)
Read/Write
Initial Value
ADTS2
211.
0
0
0
0
1
1
1
1
ADC7D
ADC Auto Trigger Source Selections
R/W
R
7
0
7
–
0
ADC6D
ADTS1
ACME
R/W
R/W
6
0
6
0
0
0
1
1
0
0
1
1
ADC5D
R/W
5
0
R
5
–
0
ADC4D
R/W
ADTS0
4
0
R
4
–
0
0
1
0
1
0
1
0
1
ATmega325/3250/645/6450
ADC3D
R/W
3
0
R
3
–
0
Trigger Source
Free Running mode
Analog Comparator
External Interrupt Request 0
Timer/Counter0 Compare MatchA
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
ADC2D
ADTS2
R/W
R/W
2
0
2
0
ADC1D
ADTS1
R/W
R/W
1
0
1
0
“ADC Conversion Result” on
ADC0D
ADTS0
R/W
R/W
0
0
0
0
ADCSRB
DIDR0
.
217
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