AT91SAM7S321-AU Atmel, AT91SAM7S321-AU Datasheet - Page 49

• Manufacturer Part Number: AT91SAM7S321-AU
• Description: IC ARM7 MCU FLASH 32K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S321-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, I2S, SPI, SSC, TWI, UART, USB
• Maximum Clock Frequency: 55 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 10 bit
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7S-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AT91SAM7xxxx
• No. Of I/o's: 32
• Ram Memory Size: 8KB
• Cpu Speed: 55MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Revision History
6175IS–ATARM–30-Aug-10
Doc. Rev
6175AS
6175BS
6175CS
6175DS
6175ES
6175FS
Comments
First issue - Unqualified on Intranet
Corresponds to 6175A full datasheet approval loop.
Qualified on Intranet.
Section 8. “Memories” on page 18
Section 12. ”AT91SAM7S Ordering Information”
“Features”,
Section 12. ”AT91SAM7S Ordering Information”
Section 10.11 on page 40
“Features” on page
removed from USART.
Section 8. ”Memories”
Section 10. ”Peripherals”
Section 11. ”Package Drawings”
“ice_nreset” signals changed to” power_on_reset” in System Controller block diagrams,
page 27
Section 4. ”Package and Pinout”
Section 10.1 ”User
SYSIRQ changed to SYSC in “Peripheral Identifiers”
AT91SAM7S161 and AT91SAM7S16 added to product family
Features: Timer Counter, on
Summary,” on page
PIO, and in
Section 10.6 ”Two-wire
slave addressing, Modes for AT91SAM7S161/16
“One Two-wire Interface (TWI)” on page
Section 10.12 ”Analog-to-digital
INL, DNL ± values of LSB.
Section 8.8.3 ”Lock
Section 9.5 ”Debug
Section 6. ”I/O Lines
and
Table 1-1, “Configuration Summary,” on page
Section 10.9 ”Timer
Figure 9-2 on page
Interface”, User peripherals are mapped between 0xF000 0000 and 0xFFFF EFFF.
1, and global: AT91SAM7S512 added to series. Reference to Manchester Encoder
Regions”, locked-region’s erase or program command updated
Unit”, Chip ID updated.
3, footnote explains TC on AT91SAM7S32/16 has only two channels accessible via
Considerations”, JTAG Port Pin, Test Pin, Erase Pin, updated.
Reformatted Memories, Consolidated Memory Mapping in
Interface”, updated reference to I
Reordered sub sections.
USB Device port, Ping-pong Mode includes Isochronous endpoints.
page 2
Counter”, precisions added to “compare and capture” output/input.
Converter”, updated Successive Approximation Register ADC and the
QFN, LQFP package drawings added.
28.
LQFP and QFN Package Outlines replace Mechanical Overview.
updated: 2 ms => 3 ms, 10 ms => 15 ms, 4 ms => 6 ms
product specific information rewritten,
2, updated in Features
AT91SAM7S321 changed in
QFN package information added
Table 10-1
2
AT91SAM7S Series Summary
C compatibility, internal address registers,
3,
Section 4. ”Package and Pinout”
and
Table 10-2
Table 1-1, “Configuration
Table 12-1 on page 48
Figure 8-1 on page 20
Figure 9-1 on
Change
Request
Ref.
CSR05-529
#2342
#2444
specs
#2748
#2832
(DBGU IP)
rfo review
BDs
4208
rfo review
4325
5063
49