ATMEGA8HVA-4TU Atmel, ATMEGA8HVA-4TU Datasheet - Page 80
![MCU AVR 8K FLASH 4MHZ 28-TSOP](/photos/7/21/72191/313-28-tsop_sml.jpg)
ATMEGA8HVA-4TU
Manufacturer Part Number
ATMEGA8HVA-4TU
Description
MCU AVR 8K FLASH 4MHZ 28-TSOP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16HVA-4CKU.pdf
(196 pages)
Specifications of ATMEGA8HVA-4TU
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 9 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
28-TSOP
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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17.5
Table 17-2.
17.5.1
17.5.2
80
Mode
0
1
2
3
4
5
Modes of Operation
ATmega8HVA/16HVA
Normal 8-bit Mode
Clear Timer on Compare Match (CTC) 8-bit Mode
ICENn
0
0
0
0
1
1
Modes of Operation
TCWn
0
0
1
1
0
1
The mode of operation is defined by the Timer/Counter Width (TCWn), Input Capture Enable
(ICENn) and the Waveform Generation Mode (WGMn0)bits in
Control Register A” on page
In the normal mode, the counter (TCNTnL) is incrementing until it overruns when it passes its
maximum 8-bit value (MAX = 0xFF) and then restarts from the bottom (0x00), see
page 80
the TCNTnL becomes zero. The TOVn Flag in this case behaves like a ninth bit, except that it is
only set, not cleared. However, combined with the timer overflow interrupt that automatically
clears the TOVn Flag, the timer resolution can be increased by software. There are no special
cases to consider in the Normal 8-bit mode, a new counter value can be written anytime. The
Output Compare Unit can be used to generate interrupts at some given time.
In Clear Timer on Compare or CTC mode, the OCRnA Register is used to manipulate the
counter resolution, see
cleared to zero when the counter value (TCNTn) matches the OCRnA. The OCRnA defines the
top value for the counter, hence also its resolution. This mode allows greater control of the Com-
pare Match output frequency. It also simplifies the operation of counting external events.
The timing diagram for the CTC mode is shown in
(TCNTn) increases until a Compare Match occurs between TCNTn and OCRnA, and then
counter (TCNTn) is cleared.
WGMn0
0
1
0
1
0
0
for bit settings. The Overflow Flag (TOVn) will be set in the same timer clock cycle as
Timer/Counter Mode
Normal 8-bit Mode
8-bit CTC
16-bit Mode
16-bit CTC
8-bit Input Capture
mode
16-bit Input Capture
mode
of Operation
Table 17-2 on page 80
90.
Table 17-2 on page 80
OCRnB,
0xFFFF
0xFFFF
OCRnA
OCRnA
0xFF
0xFF
TOP
for bit settings. In CTC mode the counter is
Figure 17-3 on page
shows the different Modes of Operation.
Immediate
Immediate
Update of
Immediate
Immediate
OCRx at
–
–
”TCCRnA – Timer/Counter n
81. The counter value
MAX (0xFFFF)
MAX (0xFFFF)
MAX (0xFFFF)
MAX (0xFF)
MAX (0xFF)
MAX (0xFF)
TOV Flag
Set on
Table 17-2 on
8024A–AVR–04/08
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