ATMEGA644A-MU Atmel, ATMEGA644A-MU Datasheet - Page 321
![IC MCU AVR 64K FLASH 44VQFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA644A-MU
Manufacturer Part Number
ATMEGA644A-MU
Description
IC MCU AVR 64K FLASH 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644A-MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 26-18. JTAG Programming Instruction (Continued)
Notes:
8272A–AVR–01/10
Instruction
8e. Read Lock Bits
8f. Read Fuses and Lock Bits
9a. Enter Signature Byte Read
9b. Load Address Byte
9c. Read Signature Byte
10a. Enter Calibration Byte Read
10b. Load Address Byte
10c. Read Calibration Byte
11a. Load No Operation Command
1. This command sequence is not required if the seven MSB are correctly set by the previous command sequence (which is
2. Repeat until o = “1”.
3. Set bits to “0” to program the corresponding Fuse, “1” to unprogram the Fuse.
4. Set bits to “0” to program the corresponding Lock bit, “1” to leave the Lock bit unchanged.
5. “0” = programmed, “1” = unprogrammed.
6. The bit mapping for Fuses Extended byte is listed in
7. The bit mapping for Fuses High byte is listed in
8. The bit mapping for Fuses Low byte is listed in
9. The bit mapping for Lock bits byte is listed in
10. Address bits exceeding PCMSB and EEAMSB
11. All TDI and TDO sequences are represented by binary digits (0b...).
normally the case).
Set (Continued)
o = data out, i = data in, x = don’t care
(9)
164A/164PA/324A/324PA/644A/644PA/1284/1284P
a = address high bits, b = address low bits, c = address extended bits, H = 0 - Low byte, 1 - High Byte,
TDI Sequence
0110110_00000000
0110111_00000000
0111010_00000000
0111110_00000000
0110010_00000000
0110110_00000000
0110111_00000000
0000011_bbbbbbbb
0110010_00000000
0110011_00000000
0000011_bbbbbbbb
0110110_00000000
0110111_00000000
0100011_00000000
0110011_00000000
0100011_00001000
0100011_00001000
Table 26-1 on page 295
Table 26-5 on page 297
(Table 26-7
Table 26-4 on page 297
Table 26-3 on page 296
and
Table
26-8) are don’t care
TDO Sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxoooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
Notes
(5)
(5)
Fuse Ext. byte
Fuse High byte
Fuse Low byte
Lock bits
321
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