PIC18F442-E/P Microchip Technology, PIC18F442-E/P Datasheet - Page 246
![IC MCU CMOS 40MHZ 8K FLASH 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F442-E/P
Manufacturer Part Number
PIC18F442-E/P
Description
IC MCU CMOS 40MHZ 8K FLASH 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F442-E/P
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F442-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 246 of 332
- Download datasheet (6Mb)
PIC18FXX2
RLNCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39564C-page 244
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register 'f'
Rotate Left f (no carry)
[ label ]
0
d
a
(f<n>)
(f<7>)
N, Z
The contents of register 'f' are
rotated one bit to the left. If 'd' is 0,
the result is placed in W. If 'd' is 1,
the result is stored back in register
'f' (default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, then the
bank will be selected as per the
BSR value (default).
1
1
RLNCF
Read
Q2
0100
1010 1011
0101 0111
f
[0,1]
[0,1]
255
dest<n+1>,
dest<0>
RLNCF
01da
Process
REG, 1, 0
Data
Q3
register f
ffff
f [,d [,a]
destination
Write to
Q4
ffff
RRCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
C
REG
W
C
Q1
=
=
=
=
=
register 'f'
Rotate Right f through Carry
[ label ]
0
d
a
(f<n>)
(f<0>)
(C)
C, N, Z
The contents of register 'f' are
rotated one bit to the right through
the Carry Flag. If 'd' is 0, the result
is placed in W. If 'd' is 1, the result
is placed back in register 'f'
(default). If ‘a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, then the
bank will be selected as per the
BSR value (default).
1
1
RRCF
Read
0011
Q2
1110 0110
0
1110 0110
0111 0011
0
f
[0,1]
[0,1]
© 2006 Microchip Technology Inc.
C
dest<7>
255
dest<n-1>,
C,
RRCF
00da
Process
REG, 0, 0
Data
register f
Q3
f [,d [,a]
ffff
destination
Write to
Q4
ffff
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