PIC18F442-E/P Microchip Technology, PIC18F442-E/P Datasheet - Page 138
![IC MCU CMOS 40MHZ 8K FLASH 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F442-E/P
Manufacturer Part Number
PIC18F442-E/P
Description
IC MCU CMOS 40MHZ 8K FLASH 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F442-E/P
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
No. Of I/o's
34
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LDACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F442-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 138 of 332
- Download datasheet (6Mb)
PIC18FXX2
REGISTER 15-4:
DS39564C-page 136
bit 7
bit 6
bit 5
bit 4
bit 3-0
bit 7
WCOL: Write Collision Detect bit
In Master Transmit mode:
1 = A write to the SSPBUF register was attempted while the I
0 = No collision
In Slave Transmit mode:
1 = The SSPBUF register is written while it is still transmitting the previous word (must be
0 = No collision
In Receive mode (Master or Slave modes):
This is a “don’t care” bit
SSPOV: Receive Overflow Indicator bit
In Receive mode:
1 = A byte is received while the SSPBUF register is still holding the previous byte (must
0 = No overflow
In Transmit mode:
This is a “don’t care” bit in Transmit mode
SSPEN: Synchronous Serial Port Enable bit
1 = Enables the serial port and configures the SDA and SCL pins as the serial port pins
0 = Disables serial port and configures these pins as I/O port pins
CKP: SCK Release Control bit
In Slave mode:
1 = Release clock
0 = Holds clock low (clock stretch), used to ensure data setup time
In Master mode:
Unused in this mode
SSPM3:SSPM0: Synchronous Serial Port Mode Select bits
1111 = I
1110 = I
1011 = I
1000 = I
0111 = I
0110 = I
Legend:
R = Readable bit
- n = Value at POR
SSPCON1: MSSP CONTROL REGISTER1 (I
WCOL
R/W-0
Note:
Note:
a transmission to be started (must be cleared in software)
cleared in software)
be cleared in software)
2
2
2
2
2
2
C Slave mode, 10-bit address with START and STOP bit interrupts enabled
C Slave mode, 7-bit address with START and STOP bit interrupts enabled
C Firmware Controlled Master mode (Slave IDLE)
C Master mode, clock = F
C Slave mode, 10-bit address
C Slave mode, 7-bit address
When enabled, the SDA and SCL pins must be properly configured as input or output.
Bit combinations not specifically listed here are either reserved, or implemented in
SPI mode only.
SSPOV
R/W-0
W = Writable bit
’1’ = Bit is set
SSPEN
R/W-0
OSC
R/W-0
CKP
/ (4 * (SSPADD+1))
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
SSPM3
R/W-0
2
C MODE)
2
SSPM2
C conditions were not valid for
R/W-0
© 2006 Microchip Technology Inc.
x = Bit is unknown
SSPM1
R/W-0
SSPM0
R/W-0
bit 0
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