AT89C5131A-TISUL Atmel, AT89C5131A-TISUL Datasheet - Page 142

• Manufacturer Part Number: AT89C5131A-TISUL
• Description: MCU 8051 32K FLASH USB 28-SOIC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131A-TISUL

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: 2-Wire, EUART, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Minimum Operating Temperature: - 40 C
• Cpu Family: 89C
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 48MHz
• Total Internal Ram Size: 1.25KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: SOIC
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

142
AT89C5131A-L
Table 99. UEPDATX Register
UEPDATX (S:CFh)
USB FIFO Data Endpoint X (X = EPNUM set in UEPNUM Register UEPNUM (S:C7h)
USB Endpoint Number)
Reset Value = XXh
Table 100. UBYCTLX Register
UBYCTLX (S:E2h)
USB Byte Count Low Register X (X = EPNUM set in UEPNUM Register UEPNUM
(S:C7h) USB Endpoint Number)
Reset Value = 00h
Bit Number
Bit Number
BYCT7
FDAT7
7 - 0
7 - 0
7
7
Mnemonic Description
Mnemonic Description
FDAT
BYCT[7:0]
BYCT6
FDAT6
Bit
Bit
6
6
[7:0]
Endpoint X FIFO data
Data byte to be written to FIFO or data byte to be read from the FIFO, for the
Endpoint X (see EPNUM).
Byte Count LSB
Least Significant Byte of the byte count of a received data packet. The most
significant part is provided by the UBYCTHX Register UBYCTHX (S:E3h) USB
Byte Count High Register X (X = EPNUM set in UEPNUM Register UEPNUM
(S:C7h) USB Endpoint Number) (see Figure 100 on page 142). This byte count is
equal to the number of data bytes received after the Data PID.
BYCT5
FDAT5
5
5
FDAT4
BYCT4
4
4
BYCT3
FDAT3
3
3
BYCT2
FDAT2
2
2
BYCT1
FDAT1
1
1
4338F–USB–08/07
BYCT0
FDAT0
0
0