ATXMEGA32A4-MH Atmel, ATXMEGA32A4-MH Datasheet - Page 42

MCU AVR 32K FLASH 1.6V 44-QFN

ATXMEGA32A4-MH

Manufacturer Part Number
ATXMEGA32A4-MH
Description
MCU AVR 32K FLASH 1.6V 44-QFN
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet

Specifications of ATXMEGA32A4-MH

Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Processor Series
ATXMEGA32x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
4 KB
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
34
Number Of Timers
5
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 12-bit
On-chip Dac
2-ch x 12-bit
Package
44VQFN EP
Device Core
AVR
Family Name
XMEGA
Maximum Speed
32 MHz
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATXMEGA32A4-MU
ATXMEGA32A4-MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA32A4-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8069Q–AVR–12/10
Figure 25-1. ADC overview
Each ADC has four MUX selection registers with a corresponding result register. This means
that four channels can be sampled within 1.5 µs without any intervention by the application other
than starting the conversion. The results will be available in the result registers.
The ADC may be configured for 8- or 12-bit resolution, reducing the minimum conversion time
(propagation delay) from 3.5 µs for 12-bit to 2.5 µs for 8-bit resolution.
ADC conversion results are provided left- or right adjusted with optional ‘1’ or ‘0’ padding. This
eases calculation when the result is represented as a signed integer (signed 16-bit number).
PORTA has one ADC. Notation of this peripheral is ADCA.
Channel C MUX selection
Channel D MUX selection
Channel A MUX selection
Channel B MUX selection
1-64 X
Reference selection
Configuration
ADC
Trigger
Event
Channel A
Channel B
Channel C
Channel D
Register
Register
Register
Register
XMEGA A4
42

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