ATXMEGA32A4-MH Atmel, ATXMEGA32A4-MH Datasheet - Page 102

• Manufacturer Part Number: ATXMEGA32A4-MH
• Description: MCU AVR 32K FLASH 1.6V 44-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA32A4-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: ATXMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 4 KB
• Interface Type: I2C/SPI/USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 5
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 12-bit
• On-chip Dac: 2-ch x 12-bit
• Package: 44VQFN EP
• Device Core: AVR
• Family Name: XMEGA
• Maximum Speed: 32 MHz
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA32A4-MU; ATXMEGA32A4-MU

37.15 8069C – 06/08
37.16 8069B – 06/08
37.17 8069A – 02/08
8069Q–AVR–12/10
1.
2.
3.
4.
5.
6.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
1.
Updated
Updated
Updated XMEGA A4 Block Diagram,
diagram.
Removed the sections related to JTAG: JTAG Reset and JTAG Interface.
Updated
Updated all tables in section
Updated
Updated
Updated
Updated
Added XMEGA A4 Block Diagram,
Updated AVR CPU
Updated Event System block diagram,
Updated
Updated
Updated
Inserted a new
Updated
Inserted
Added Speed grades in
Initial revision.
”Instruction Set Summary” on page
Figure 2-1 on page 3
”Overview” on page
Table 14-1 on page
”Features” on page
”Pinout/Block Diagram” on page 3
”Ordering Information” on page
”Overview” on page
”PMIC - Programmable Multi-level Interrupt Controller” on page
”AC - Analog Comparator” on page
”I/O configuration” on page
”Peripheral Module Address Map” on page
Figure 16-1 on page
”Features” on page 8
”Speed” on page
”Alternate Pin Functions” on page
1.
25.
5.
5, included the XMEGA A4 explanation text on page 6.
and
”Pinout and Pin Functions” on page
Figure 3-1 on page
32.
27.
Figure 3-1 on page 6
Figure 9-1 on page
2.
and Updated
63.
and
54.
44.
”Pinout and Pin Functions” on page
53.
6.
Figure 6-1 on page
17.
by removing JTAG from the block
51.
49.
25.
XMEGA A4
8.
49.
102