DSPIC33FJ64MC510-E/PT Microchip Technology, DSPIC33FJ64MC510-E/PT Datasheet - Page 336

IC DSPIC MCU/DSP 64K 100TQFP

DSPIC33FJ64MC510-E/PT

Manufacturer Part Number
DSPIC33FJ64MC510-E/PT
Description
IC DSPIC MCU/DSP 64K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC510-E/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-TFQFP
For Use With
AC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
dsPIC33FJXXXMCX06/X08/X10
Reset
Reset Sequence.................................................................. 85
Resets ................................................................................. 79
S
Serial Peripheral Interface (SPI) ....................................... 195
Software Simulator (MPLAB SIM)..................................... 270
Software Stack Pointer, Frame Pointer
Special Features of the CPU............................................. 253
SPI Module
Symbols Used in Opcode Descriptions............................. 262
System Control
T
Temperature and Voltage Specifications
Timer1 ............................................................................... 163
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 165
Timing Characteristics
Timing Diagrams
DS70287C-page 334
PTPER (PWM Time Base Period) ............................ 180
PWMCON1 (PWM Control 1) ................................... 182
PWMCON2 (PWM Control 2) ................................... 183
QEICON (QEI Control).............................................. 192
RCON (Reset Control) ................................................ 80
SEVTCMP (Special Event Compare) ....................... 181
SPIxCON1 (SPIx Control 1) ...................................... 197
SPIxCON2 (SPIx Control 2) ...................................... 199
SPIxSTAT (SPIx Status and Control) ....................... 196
SR (CPU Status) ................................................... 26, 90
T1CON (Timer1 Control)........................................... 164
TxCON (T2CON, T4CON, T6CON or T8CON Control) ..
TyCON (T3CON, T5CON, T7CON or T9CON Control) ..
UxMODE (UARTx Mode) .......................................... 210
UxSTA (UARTx Status and Control) ......................... 212
Clock Source Selection ............................................... 82
Special Function Register Reset States ..................... 84
Times .......................................................................... 82
CALLL Stack Frame.................................................... 63
SPI1 Register Map ...................................................... 51
SPI2 Register Map ...................................................... 51
Register Map............................................................... 62
AC ............................................................................. 282
CLKO and I/O ........................................................... 285
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 309
CAN I/O..................................................................... 305
External Clock ........................................................... 283
I2Cx Bus Data (Master Mode) .................................. 301
I2Cx Bus Data (Slave Mode) .................................... 303
I2Cx Bus Start/Stop Bits (Master Mode) ................... 301
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 303
Input Capture (CAPx)................................................ 290
Motor Control PWM .................................................. 292
Motor Control PWM Fault ......................................... 292
OC/PWM ................................................................... 291
Output Compare (OCx) ............................................. 290
QEA/QEB Input ......................................................... 293
QEI Module Index Pulse ........................................... 294
Reset, Watchdog Timer, Oscillator Start-up Timer and
SPIx Master Mode (CKE = 0).................................... 296
168
169
= 0, SSRC = 000).............................................. 311
= 1, SSRC = 111, SAMC = 00001) ................... 312
Power-up Timer ................................................ 286
Timing Requirements
Timing Specifications
U
UART Module
V
Voltage Regulator (On-Chip) ............................................ 258
W
Watchdog Timer (WDT)............................................ 253, 259
WWW Address ................................................................. 335
WWW, On-Line Support ..................................................... 11
SPIx Master Mode (CKE = 1) ................................... 297
SPIx Slave Mode (CKE = 0) ..................................... 298
SPIx Slave Mode (CKE = 1) ..................................... 299
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 288
TimerQ (QEI Module) External Clock ....................... 295
CLKO and I/O ........................................................... 285
External Clock........................................................... 283
Input Capture ............................................................ 290
10-bit A/D Conversion Requirements ....................... 313
12-bit A/D Conversion Requirements ....................... 310
CAN I/O Requirements ............................................. 305
I2Cx Bus Data Requirements (Master Mode)........... 302
I2Cx Bus Data Requirements (Slave Mode)............. 304
Motor Control PWM Requirements........................... 292
Output Compare Requirements................................ 290
PLL Clock ................................................................. 284
QEI External Clock Requirements ............................ 295
QEI Index Pulse Requirements ................................ 294
Quadrature Decoder Requirements.......................... 293
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
Simple OC/PWM Mode Requirements ..................... 291
SPIx Master Mode (CKE = 0) Requirements............ 296
SPIx Master Mode (CKE = 1) Requirements............ 297
SPIx Slave Mode (CKE = 0) Requirements.............. 298
SPIx Slave Mode (CKE = 1) Requirements.............. 300
Timer1 External Clock Requirements ....................... 288
Timer2, Timer4, Timer6 and Timer8 External Clock Re-
Timer3, Timer5, Timer7 and Timer9 External Clock Re-
UART1 Register Map.................................................. 51
UART2 Register Map.................................................. 51
Programming Considerations ................................... 259
er-up Timer and Brown-out Reset Requirements...
287
quirements........................................................ 289
quirements........................................................ 289
© 2009 Microchip Technology Inc.

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