AT32UC3B1128-Z1UR Atmel, AT32UC3B1128-Z1UR Datasheet - Page 69
AT32UC3B1128-Z1UR
Manufacturer Part Number
AT32UC3B1128-Z1UR
Description
MCU AVR32 128K FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B1128-Z1UR
Package / Case
48-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
28
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 6x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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9.6.18
Name:
Access Type:
Offset:
Reset Value:
•
•
•
•
•
•
•
•
32059J–12/2010
OCDRST: OCD Reset
CPUERR: CPU Error
SLEEP:
JTAG: JTAG reset
WDT: Watchdog Reset
EXT: External Reset Pin
BOD: Brown-out Reset
POR Power-on Reset
CPUERR
31
23
15
7
-
-
-
The CPU was reset because the RES strobe in the OCD Development Control register has been written to one.
The CPU was reset because it had detected an illegal access.
The CPU was reset because it went to SHUTDOWN or STATIC sleep mode.
The CPU was reset by setting the bit RC_CPU in the JTAG reset register.
The CPU was reset because of a watchdog time-out.
The CPU was reset due to the RESET pin being asserted.
The CPU was reset due to the supply voltage being lower than the brown-out threshold level.
The CPU was reset due to the supply voltage being lower than the power-on threshold level.
Reset Cause Register
SLEEP
30
22
14
RCAUSE
Read-only
0x140
Latest Reset Source
6
-
-
-
29
21
13
5
-
-
-
-
JTAG
28
20
12
4
-
-
-
WDT
27
19
11
3
-
-
-
EXT
26
18
10
2
-
-
-
BOD
25
17
9
1
-
-
-
AT32UC3B
OCDRST
POR
24
16
8
0
-
-
69
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