AT32UC3B1128-Z1UR Atmel, AT32UC3B1128-Z1UR Datasheet - Page 23
AT32UC3B1128-Z1UR
Manufacturer Part Number
AT32UC3B1128-Z1UR
Description
MCU AVR32 128K FLASH 48-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B1128-Z1UR
Package / Case
48-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
28
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
128KB (128K x 8)
Data Converters
A/D 6x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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6.4.3
6.4.3.1
6.4.3.2
32059J–12/2010
Processor States
Debug State
Normal RISC State
Figure 6-5.
The AVR32 processor supports several different execution contexts as shown in
page
Table 6-2.
Mode changes can be made under software control, or can be caused by external interrupts or
exception processing. A mode can be interrupted by a higher priority mode, but never by one
with lower priority. Nested exceptions can be supported with a minimal software overhead.
When running an operating system on the AVR32, user processes will typically execute in the
application mode. The programs executed in this mode are restricted from executing certain
instructions. Furthermore, most system registers together with the upper halfword of the status
register cannot be accessed. Protected memory areas are also not available. All other operating
modes are privileged and are collectively called System Modes. They have full access to all priv-
ileged and unprivileged resources. After a reset, the processor will be in supervisor mode.
The AVR32 can be set in a debug state, which allows implementation of software monitor rou-
tines that can read out and alter system information for use during application development. This
implies that all system and application registers, including the status registers and program
counters, are accessible in debug state. The privileged instructions are also available.
Bit 15
Priority
1
2
3
4
5
6
N/A
N/A
0
-
23.
T
0
0
-
Mode
Non Maskable Interrupt
Exception
Interrupt 3
Interrupt 2
Interrupt 1
Interrupt 0
Supervisor
Application
The Status Register Low Halfword
Overview of Execution Modes, their Priorities and Privilege Levels.
0
-
0
-
0
-
0
-
0
-
0
-
Security
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Unprivileged
0
-
L
0
Q
0
V
0
Description
Non Maskable high priority interrupt mode
Execute exceptions
General purpose interrupt mode
General purpose interrupt mode
General purpose interrupt mode
General purpose interrupt mode
Runs supervisor calls
Normal program execution mode
N
0
Z
0
Bit 0
C
0
Bit name
Initial value
Carry
Zero
Sign
Overflow
Saturation
Lock
Reserved
Scratch
Reserved
AT32UC3B
Table 6-2 on
23
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