AT89C5131A-TIRUL Atmel, AT89C5131A-TIRUL Datasheet - Page 68
![MCU 8051 32K FLASH USB 28-SOIC](/photos/6/82/68295/453-28-soic_sml.jpg)
AT89C5131A-TIRUL
Manufacturer Part Number
AT89C5131A-TIRUL
Description
MCU 8051 32K FLASH USB 28-SOIC
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5131A-TIRUL
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
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- Download datasheet (2Mb)
Broadcast Address
Reset Addresses
68
AT89C5131A-L
The SADEN byte is selected so that each slave may be addressed separately.
For slave A, bit 0 (the LSB) is a don’t care bit; for slaves B and C, bit 0 is a 1. To commu-
nicate with slave A only, the master must send an address where bit 0 is clear (e.g.
1111 0000b).
For slave A, bit 1 is a 1; for slaves B and C, bit 1 is a don’t care bit. To communicate with
slaves B and C, but not slave A, the master must send an address with bits 0 and 1 both
set (e.g. 1111 0011b).
To communicate with slaves A, B and C, the master must send an address with bit 0 set,
bit 1 clear, and bit 2 clear (e.g. 1111 0001b).
A broadcast address is formed from the logical OR of the SADDR and SADEN registers
with zeros defined as don’t care bits, e.g.:
The use of don’t care bits provides flexibility in defining the broadcast address, in most
applications, a broadcast address is FFh. The following is an example of using broad-
cast addresses:
For slaves A and B, bit 2 is a don’t care bit; for slave C, bit 2 is set. To communicate with
all of the slaves, the master must send an address FFh. To communicate with slaves A
and B, but not slave C, the master can send and address FBh.
On reset, the SADDR and SADEN registers are initialized to 00h, i.e. the given and
broadcast addresses are XXXX XXXXb (all don’t care bits). This ensures that the serial
port will reply to any address, and so, that it is backwards compatible with the 80C51
microcontrollers that do not support automatic address recognition.
SADEN - Slave Address Mask Register (B9h)
Reset Value = 0000 0000b
Not bit addressable
Slave A:SADDR1111 0001b
Slave B:SADDR1111 0011b
Slave C:SADDR = 1111 0011b
7
Broadcast = SADDR OR SADEN1111 111Xb
SADDR0101 0110b
SADEN1111 1100b
SADEN1111 1010b
Broadcast1111 1X11b,
SADEN1111 1001b
Broadcast1111 1X11B,
SADEN1111 1101b
Broadcast1111 1111b
6
5
4
3
2
1
4338F–USB–08/07
0
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