AT89C5131A-TIRUL Atmel, AT89C5131A-TIRUL Datasheet - Page 17
![MCU 8051 32K FLASH USB 28-SOIC](/photos/6/82/68295/453-28-soic_sml.jpg)
AT89C5131A-TIRUL
Manufacturer Part Number
AT89C5131A-TIRUL
Description
MCU 8051 32K FLASH USB 28-SOIC
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5131A-TIRUL
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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4338F–USB–08/07
Table 15. CKCON1 (S:AFh)
Clock Control Register 1
Reset Value = 0000 0000b
Table 16. PLLCON (S:A3h)
PLL Control Register
Reset Value = 0000 0000b
Table 17. PLLDIV (S:A4h)
PLL Divider Register
Reset Value = 0000 0000
Bit Number
Bit Number
Bit Number
R3
7-1
7-3
7-4
3-0
7
7
7
-
-
0
2
1
0
Mnemonic Description
Mnemonic Description
Mnemonic Description
PLOCK
PLLEN
EXT48
SPIX2
R3:0
N3:0
Bit
Bit
R2
Bit
6
6
6
-
-
-
-
Reserved
The value read from this bit is always 0. Do not set this bit.
SPI Clock
This control bit is validated when the CPU clock X2 is set. When X2 is low,
this bit has no effect.
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Reserved
The value read from this bit is always 0. Do not set this bit.
External 48 MHz Enable Bit
Set this bit to bypass the PLL and disable the crystal oscillator.
Clear this bit to select the PLL output as USB clock and to enable the crystal
oscillator.
PLL Enable Bit
Set to enable the PLL.
Clear to disable the PLL.
PLL Lock Indicator
Set by hardware when PLL is locked.
Clear by hardware when PLL is unlocked.
PLL R Divider Bits
PLL N Divider Bits
R1
5
5
5
-
-
R0
4
4
4
-
-
N3
3
3
3
-
-
EXT48
N2
2
2
2
-
PLLEN
N1
1
1
1
-
PLOCK
SPIX2
N0
0
0
0
17
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