PIC16C622-20E/SS Microchip Technology, PIC16C622-20E/SS Datasheet - Page 53
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PIC16C622-20E/SS
Manufacturer Part Number
PIC16C622-20E/SS
Description
IC MCU OTP 2KX14 COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C622-20E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
9.4.5
On power-up the time-out sequence is as follows: First
PWRT time-out is invoked after POR has expired. Then
OST is activated. The total time-out will vary based on
oscillator configuration and PWRTE bit status. For
example, in RC mode with PWRTE bit erased (PWRT
disabled), there will be no time-out at all. Figure 9-8,
Figure 9-9 and Figure 9-10 depict time-out sequences.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(see Figure 9-9). This is useful for testing purposes or
to synchronize more than one PIC16C62X device
operating in parallel.
Table 9-4 shows the RESET conditions for some
special registers, while Table 9-5 shows the RESET
conditions for all the registers.
TABLE 9-1:
TABLE 9-2:
Legend: u = unchanged, x = unknown
TABLE 9-3:
2003 Microchip Technology Inc.
Address
83h
8Eh
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
Note 1: Other (non Power-up) Resets include MCLR Reset, Brown-out Reset and Watchdog Timer Reset during
Oscillator Configuration
POR
0
0
0
1
1
1
1
1
XT, HS, LP
normal operation.
TIME-OUT SEQUENCE
Name
STATUS
PCON
RC
BOR
X
X
X
0
1
1
1
1
TIME-OUT IN VARIOUS SITUATIONS
STATUS/PCON BITS AND THEIR SIGNIFICANCE
SUMMARY OF REGISTERS ASSOCIATED WITH BROWN-OUT
Bit 7
—
TO
1
0
X
X
0
0
u
1
Bit 6
—
72 ms + 1024 T
PWRTE = 0
PD
1
X
0
X
u
0
u
0
Bit 5
72 ms
—
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP
Bit 4
OSC
Power-up
TO
—
Bit 3
PD
—
PWRTE = 1
1024 T
9.4.6
The power control/STATUS register, PCON (address
8Eh), has two bits.
Bit0 is BOR (Brown-out). BOR is unknown on Power-
on Reset. It must then be set by the user and checked
on subsequent RESETS to see if BOR = 0, indicating
that a brown-out has occurred. The BOR STATUS bit is
a don’t care and is not necessarily predictable if the
brown-out circuit is disabled (by setting BODEN bit = 0
in the Configuration word).
Bit1 is POR (Power-on Reset). It is a ‘0’ on Power-on
Reset and unaffected otherwise. The user must write a
‘1’ to this bit following a Power-on Reset. On a
subsequent RESET, if POR is ‘0’, it will indicate that a
Power-on Reset must have occurred (V
gone too low).
Bit 2
—
—
OSC
Bit 1
POR
POWER CONTROL (PCON)/
STATUS REGISTER
72 ms + 1024 T
Brown-out Reset
Bit 0
BOR
72 ms
PIC16C62X
Value on
POR Reset
0001 1xxx 000q quuu
---- --0x ---- --uq
OSC
DS30235J-page 51
from SLEEP
DD
1024 T
Value on all
other
RESETS
Wake-up
may have
—
OSC
(1)