ATMEGA128A-AUR Atmel, ATMEGA128A-AUR Datasheet - Page 241

MCU AVR 128K FLASH 16MHZ 64TQFP

ATMEGA128A-AUR

Manufacturer Part Number
ATMEGA128A-AUR
Description
MCU AVR 128K FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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23.7.3
23.7.4
8151H–AVR–02/11
Offset Compe’nsation Schemes
ADC Accuracy Definitions
Figure 23-7. ADC Power Connections
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by selecting the same channel for both differential inputs. This offset residue can be then
subtracted in software from the measurement results. Using this kind of software based offset
correction, offset on any channel can be reduced below one LSB.
An n-bit single-ended ADC converts a voltage linearly between GND and V
(LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
1. Keep analog signal paths as short as possible. Make sure analog tracks run over the
2. The AVCC pin on the device should be connected to the digital V
3. Use the ADC noise canceler function to reduce induced noise from the CPU.
4. If any ADC port pins are used as digital outputs, it is essential that these do not switch
ground plane, and keep them well away from high-speed switching digital tracks.
an LC network as shown in
while a conversion is in progress.
100nF
(ADC7) PF7
(ADC6) PF6
(ADC5) PF5
(ADC4) PF4
(ADC3) PF3
(ADC2) PF2
(ADC1) PF1
(ADC0) PF0
Figure
(AD0) PA0
AVCC
AREF
GND
GND
23-7.
VCC
51
52
53
54
55
56
57
58
59
60
61
61
62
62
63
63
64
64
1
ATmega128A
CC
n
-1.
supply voltage via
REF
in 2
n
steps
241

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