PIC16LC926T-I/PT Microchip Technology, PIC16LC926T-I/PT Datasheet - Page 28
![IC MCU CMOS 20MHZ 8K W/LCD64TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC16LC926T-I/PT
Manufacturer Part Number
PIC16LC926T-I/PT
Description
IC MCU CMOS 20MHZ 8K W/LCD64TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC926T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16LC926T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16C925/926
2.6
The INDF register is not a physical register. Addressing
the INDF register will cause indirect addressing.
Indirect addressing is possible by using the INDF reg-
ister. Any instruction using the INDF register actually
accesses the register pointed to by the File Select Reg-
ister (FSR). Reading the INDF register itself, indirectly
(FSR = ’0’), will produce 00h. Writing to the INDF regis-
ter indirectly results in a no operation (although status
bits may be affected). An effective 9-bit address is
obtained by concatenating the 8-bit FSR register and
the IRP bit (STATUS<7>), as shown in Figure 2-6.
FIGURE 2-6:
DS39544A-page 26
Bank Select
RP1:RP0
Note: For memory map detail, see Figure 2-3.
Indirect Addressing, INDF and
FSR Registers
Direct Addressing
Location Select
6
Data
Memory
DIRECT/INDIRECT ADDRESSING
From Opcode
7Fh
00h
Bank 0
00
0
Bank 1
01
Preliminary
Bank 2
10
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-2.
EXAMPLE 2-2:
NEXT
CONTINUE
Bank 3
11
IRP
MOVLW 0x20
MOVWF FSR
CLRF
INCF
BTFSS FSR,4
GOTO
:
Bank Select
00h
7Fh
INDF
FSR,F
NEXT
7
Indirect Addressing
INDIRECT ADDRESSING
2001 Microchip Technology Inc.
;initialize pointer
;to RAM
;clear INDF register
;inc pointer
;all done?
;no clear next
;yes continue
FSR Register
Location Select
0
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