PIC16C773-I/SS Microchip Technology, PIC16C773-I/SS Datasheet - Page 79

• Manufacturer Part Number: PIC16C773-I/SS
• Description: IC MCU OTP 4KX14 A/D PWM 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C773-I/SS

• Program Memory Type: OTP
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C/SPI/SSP/UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 3
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 12-bit
• Controller Family/series: PIC16C
• No. Of I/o's: 22
• Ram Memory Size: 256Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 309-1025 - ADAPTER 28-SSOP TO 28-DIP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

8.2.11
Transmission of a data byte, a 7-bit address, or either
half of a 10-bit address is accomplished by simply writ-
ing a value to SSPBUF register. This action will set the
buffer full flag (BF) and allow the baud rate generator to
begin counting and start the next transmission. Each
bit of address/data will be shifted out onto the SDA pin
after the falling edge of SCL is asserted (see data hold
time spec).
ator roll over count (T
SCL is released high (see Data setup time spec).
When the SCL pin is released high, it is held that way
for T
for that duration and some hold time after the next fall-
ing edge of SCL. After the eighth bit is shifted out (the
falling edge of the eighth clock), the BF flag is cleared
and the master releases SDA allowing the slave device
being addressed to respond with an ACK bit during the
ninth bit time, if an address match occurs or if data was
received properly. The status of ACK is read into the
AKDT on the falling edge of the ninth clock. If the mas-
ter receives an acknowledge, the acknowledge status
bit (AKSTAT) is cleared. If not, the bit is set. After the
ninth clock the SSPIF is set, and the master clock
(baud rate generator) is suspended until the next data
byte is loaded into the SSPBUF leaving SCL low and
SDA unchanged
After the write to the SSPBUF, each bit of address will
be shifted out on the falling edge of SCL until all seven
address bits and the R/W bit are completed. On the fall-
ing edge of the eighth clock the master will de-assert
the SDA pin allowing the slave to respond with an
acknowledge. On the falling edge of the ninth clock the
master will sample the SDA pin to see if the address
was recognized by a slave. The status of the ACK bit is
loaded into the AKSTAT status bit (SSPCON2<6>). Fol-
lowing the falling edge of the ninth clock transmission
of the address, the SSPIF is set, the BF flag is cleared,
and the baud rate generator is turned off until another
write to the SSPBUF takes place, holding SCL low and
allowing SDA to float.
1999 Microchip Technology Inc.
BRG
, the data on the SDA pin must remain stable
I
2
C MASTER MODE TRANSMISSION
SCL is held low for one baud rate gener-
(Figure
BRG
8-26).
). Data should be valid before
Advance Information
8.2.11.7
In transmit mode, the BF bit (SSPSTAT<0>) is set when
the CPU writes to SSPBUF and is cleared when all 8
bits are shifted out.
8.2.11.8
If the user writes the SSPBUF when a transmit is
already in progress (i.e. SSPSR is still shifting out a
data byte), then WCOL is set and the contents of the
buffer are unchanged (the write doesn’t occur).
WCOL must be cleared in software.
8.2.11.9
In transmit mode, the AKSTAT bit (SSPCON2<6>) is
cleared when the slave has sent an acknowledge
(ACK = 0), and is set when the slave does not acknowl-
edge (ACK = 1). A slave sends an acknowledge when
it has recognized its address (including a general call),
or when the slave has properly received its data.
BF STATUS FLAG
WCOL STATUS FLAG
AKSTAT STATUS FLAG
PIC16C77X
DS30275A-page 79