PIC18F87J11-I/PT Microchip Technology, PIC18F87J11-I/PT Datasheet - Page 309

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PIC18F87J11-I/PT

Manufacturer Part Number
PIC18F87J11-I/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F87J11-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F87J11-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
22.6
The comparator interrupt flag is set whenever any of
the following occurs:
• Low-to-high transition of the comparator output
• High-to-low transition of the comparator output
• Any change in the comparator output
The comparator interrupt selection is done by the
EVPOL1:EVPOL0 bits in the CMxCON register
(CMxCON<4:3>).
In order to provide maximum flexibility, the output of the
comparator may be inverted using the CPOL bit in the
CMxCON register (CMxCON<5>). This is functionally
identical to reversing the inverting and non-inverting
inputs of the comparator for a particular mode.
An interrupt is generated on the low-to-high or high-to-
low transition of the comparator output. This mode of
interrupt generation is dependent on EVPOL<1:0> in
the CMxCON register. If EVPOL<1:0> = 01 or 10, the
interrupt is generated on a low-to-high or high-to-low
TABLE 22-2:
© 2009 Microchip Technology Inc.
CPOL
Comparator Interrupts
0
1
COMPARATOR INTERRUPT GENERATION
EVPOL<1:0>
00
01
10
11
00
01
10
11
Input Change
Comparator
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
+ > V
+ < V
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PIC18F87J11 FAMILY
transition of the comparator output. Once the interrupt
is generated, it is required to clear the interrupt flag by
software.
When EVPOL<1:0> = 11, the comparator interrupt flag
is set whenever there is a change in the output value of
either comparator. Software will need to maintain infor-
mation about the status of the output bits, as read from
CMSTAT<1:0>, to determine the actual change that
occurred. The CMxIF bits (PIR2<6:5>) are the Compar-
ator Interrupt Flags. The CMxIF bits must be reset by
clearing them. Since it is also possible to write a ‘1’ to
this register, a simulated interrupt may be initiated.
Table 22-2 shows the interrupt generation with respect
to comparator input voltages and EVPOL bit settings.
Both the CMxIE bits (PIE2<6:5>) and the PEIE bit (INT-
CON<6>) must be set to enable the interrupt. In addi-
tion, the GIE bit (INTCON<7>) must also be set. If any
of these bits are clear, the interrupt is not enabled,
though the CMxIF bits will still be set if an interrupt
condition occurs.
COUTx Transition
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
High-to-Low
Low-to-High
DS39778D-page 309
Generated
Interrupt
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No

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