PIC18F87J11-I/PT Microchip Technology, PIC18F87J11-I/PT Datasheet - Page 139

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PIC18F87J11-I/PT

Manufacturer Part Number
PIC18F87J11-I/PT
Description
IC PIC MCU FLASH 64KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F87J11-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Ram Size
3930 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 15x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
EUSART/I2C/MSSP/SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
15-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164136 - DEVELOPMENT KIT FOR PIC18AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F87J11-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F87J11-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE 10-10: PORTD FUNCTIONS
© 2009 Microchip Technology Inc.
RD0/AD0/
PMD0
RD1/AD1/
PMD1
RD2/AD2/
PMD2
RD3/AD3/
PMD3
RD4/AD4/
PMD4/SDO2
RD5/AD5/
PMD5/SDI2/
SDA2
Legend:
Note 1:
Pin Name
2:
3:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
External memory interface I/O takes priority over all other digital and PMP I/O.
Available on 80-pin devices only.
Default configuration for PMP (PMPMX Configuration bit = 1).
Function
PMD0
PMD1
PMD2
PMD3
PMD4
PMD5
AD0
AD1
AD2
AD3
AD4
AD5
SDO2
SDA2
SDI2
RD0
RD1
RD2
RD3
RD4
RD5
(2)
(2)
(2)
(2)
(2)
(2)
(3)
(3)
(3)
(3)
(3)
(3)
Setting
TRIS
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
0
1
x
x
x
x
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
DIG
TTL
DIG
TTL
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
LATD<0> data output.
PORTD<0> data input.
External memory interface, address/data bit 0 output.
External memory interface, data bit 0 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<1> data output.
PORTD<1> data input.
External memory interface, address/data bit 1 output.
External memory interface, data bit 1 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<2> data output.
PORTD<2> data input.
External memory interface, address/data bit 2 output.
External memory interface, data bit 2 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<3> data output.
PORTD<3> data input.
External memory interface, address/data bit 3 output.
External memory interface, data bit 3 input.
Parallel Master Port data out.
Parallel Master Port data input.
LATD<4> data output.
PORTD<4> data input.
External memory interface, address/data bit 4 output.
External memory interface, data bit 4 input.
Parallel Master Port data out.
Parallel Master Port data input.
SPI data output (MSSP2 module); takes priority over port data.
LATD<5> data output.
PORTD<5> data input.
External memory interface, address/data bit 5 output.
External memory interface, data bit 5 input.
Parallel Master Port data out.
Parallel Master Port data input.
SPI data input (MSSP2 module).
I
I
setting.
2
2
C™ data output (MSSP2 module); takes priority over port data.
C data input (MSSP2 module); input type depends on module
PIC18F87J11 FAMILY
Description
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DS39778D-page 139
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