PIC18F27J53-I/ML Microchip Technology, PIC18F27J53-I/ML Datasheet - Page 114
![IC PIC MCU 128KB FLASH 28QFN](/photos/18/33/183309/qfn-28_sml.jpg)
PIC18F27J53-I/ML
Manufacturer Part Number
PIC18F27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18F27J53-I/ML
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 114 of 496
- Download datasheet (5Mb)
PIC18(L)F2X/4XK22
instructions. Individual interrupt flag bits are set,
regardless of the status of their corresponding enable
bits or the Global Interrupt Enable bit.
FIGURE 9-1:
DS41412D-page 114
Note:
High Priority Interrupt Generation
Low Priority Interrupt Generation
Note 1:
Do not use the MOVFF instruction to mod-
ify any of the interrupt control registers
while any interrupt is enabled. Doing so
may cause erratic microcontroller behav-
ior.
The RBIF interrupt also requires the individual pin IOCB enables.
PIC18 INTERRUPT LOGIC
PIR1<6:0>
PIE1<6:0>
IPR1<6:0>
PIR2<7:0>
PIE2<7:0>
PIR4<2:0>
PIE4<2:0>
PIR5<2:0>
PIE5<2:0>
IPR5<2:0>
PIR1<6:0>
PIE1<6:0>
IPR1<6:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
IPR4<2:0>
PIR2<7:0>
PIE2<7:0>
IPR2<7:0>
PIR3<7:0>
PIE3<7:0>
IPR3<7:0>
PIR4<2:0>
PIE4<2:0>
IPR4<2:0>
PIR5<2:0>
PIE5<2:0>
IPR5<2:0>
Preliminary
TMR0IF
TMR0IE
TMR0IP
TMR0IF
TMR0IE
TMR0IP
INT1IF
INT1IE
INT1IP
INT2IF
INT2IE
INT2IP
INT0IF
INT0IE
INT1IE
INT1IP
INT2IE
INT2IP
INT1IF
INT2IF
RBIF
RBIE
RBIP
RBIF
RBIE
RBIP
IPEN
GIEL/PEIE
(1)
(1)
IPEN
IPEN
2010 Microchip Technology Inc.
GIEH/GIE
GIEL/PEIE
Idle or Sleep modes
GIEH/GIE
0008h
Wake-up if in
Interrupt to CPU
Vector to Location
Interrupt to CPU
Vector to Location
0018h
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