DSPIC30F4012-20I/ML Microchip Technology, DSPIC30F4012-20I/ML Datasheet - Page 231

• Manufacturer Part Number: DSPIC30F4012-20I/ML
• Description: IC DSPIC MCU/DSP 48K 44QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4012-20I/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 20
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44QFN4 - SOCKET TRANS ICE 28DIP TO 44QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F401220IML

M
Microchip Internet Web Site .............................................. 235
Modulo Addressing ............................................................. 38
Motor Control PWM Module................................................ 95
MPLAB ASM30 Assembler, Linker, Librarian ................... 172
MPLAB Integrated Development Environment Software .. 171
MPLAB PM3 Device Programmer .................................... 174
MPLAB REAL ICE In-Circuit Emulator System................. 173
MPLINK Object Linker/MPLIB Object Librarian ................ 172
O
Operating MIPS vs. Voltage.............................................. 176
Oscillator
Oscillator Selection ........................................................... 149
Output Compare Module..................................................... 83
P
Packaging ......................................................................... 219
Pinout Descriptions
POR. See Power-on Reset.
Position Measurement Mode .............................................. 91
Power-Saving Modes ........................................................ 159
Power-Saving Modes (Sleep and Idle) ............................. 149
Program Address Space ..................................................... 25
Program Counter ................................................................ 18
Program Data Table Access (lsw) ...................................... 27
Program Data Table Access (MSB) .................................... 28
Program Space Visibility
Programmable Digital Noise Filters .................................... 91
Programmer’s Model........................................................... 18
© 2010 Microchip Technology Inc.
Applicability ................................................................. 40
Operation Example ..................................................... 39
Start and End Address................................................ 39
W Address Register Selection .................................... 39
Register Map............................................................. 105
Configurations........................................................... 152
Operating Modes (Table) .......................................... 150
During CPU Idle Mode ................................................ 86
During CPU Sleep Mode............................................. 86
Interrupts..................................................................... 86
Register Map............................................................... 87
Details ....................................................................... 221
Marking ..................................................................... 219
dsPIC30F4011 ............................................................ 12
dsPIC30F4012 ............................................................ 14
Idle ............................................................................ 160
Sleep......................................................................... 159
Construction................................................................ 26
Data Access From Program Memory Using Table In-
Data Access From, Address Generation .................... 26
Memory Map ............................................................... 25
Table Instructions
Window into Program Space Operation...................... 29
Fail-Safe Clock Monitor .................................... 154
Fast RC (FRC) .................................................. 153
Initial Clock Source Selection ........................... 152
Low-Power RC (LPRC)..................................... 153
LP ..................................................................... 153
Phase Locked Loop (PLL) ................................ 153
Start-up Timer (OST) ........................................ 152
structions ............................................................ 27
TBLRDH ............................................................. 27
TBLRDL .............................................................. 27
TBLWTH ............................................................. 27
TBLWTL.............................................................. 27
Programming Operations.................................................... 51
Protection Against Accidental Writes to OSCCON ........... 154
PWM Duty Cycle Comparison Units ................................. 100
PWM Fault Pin.................................................................. 103
PWM Operation During CPU Idle Mode ........................... 104
PWM Operation During CPU Sleep Mode........................ 104
PWM Output and Polarity Control..................................... 103
PWM Output Override ...................................................... 102
PWM Period........................................................................ 98
PWM Special Event Trigger.............................................. 104
PWM Time Base................................................................. 97
PWM Update Lockout....................................................... 104
Q
QEI Module
Quadrature Encoder Interface (QEI)................................... 89
R
Reader Response............................................................. 236
Reset ........................................................................ 149, 155
Reset Sequence ................................................................. 45
Revision History................................................................ 227
RTSP
dsPIC30F4011/4012
Diagram ...................................................................... 19
Algorithm for Program Flash....................................... 51
Erasing a Row of Program Memory ........................... 51
Initiating the Programming Sequence ........................ 52
Loading Write Latches................................................ 52
Duty Cycle Register Buffers ..................................... 100
Enable Bits ............................................................... 103
Fault States .............................................................. 103
Input Modes.............................................................. 103
Output Pin Control .................................................... 103
Complementary Output Mode .................................. 102
Synchronization ........................................................ 102
Postscaler................................................................. 104
Continuous Up/Down Count Modes ........................... 97
Double Update Mode.................................................. 98
Free-Running Mode.................................................... 97
Postscaler................................................................... 98
Prescaler .................................................................... 98
Single-Shot Mode ....................................................... 97
Operation During CPU Sleep Mode ........................... 91
Timer Operation During CPU Sleep Mode ................. 91
Interrupts .................................................................... 92
Logic ........................................................................... 90
Operation During CPU Idle Mode............................... 92
Register Map .............................................................. 93
Timer Operation During CPU Idle Mode..................... 92
BOR, Programmable ................................................ 157
Oscillator Start-up Timer (OST)................................ 149
POR.......................................................................... 155
Power-on Reset (POR)............................................. 149
Power-up Timer (PWRT) .......................................... 149
Programmable Brown-out Reset (BOR) ................... 149
Reset Sources ............................................................ 45
Control Registers........................................................ 50
Operation.................................................................... 50
Cycle-by-Cycle ................................................. 103
Latched............................................................. 103
Long Crystal Start-up Time............................... 157
Operating Without FSCM and PWRT............... 157
NVMADR ............................................................ 50
NVMADRU ......................................................... 50
NVMCON............................................................ 50
NVMKEY ............................................................ 50
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