PIC16F73-I/ML Microchip Technology, PIC16F73-I/ML Datasheet - Page 677

IC MCU FLASH 4KX14 A/D 28QFN

PIC16F73-I/ML

Manufacturer Part Number
PIC16F73-I/ML
Description
IC MCU FLASH 4KX14 A/D 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F73-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
22
Ram Memory Size
192Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm
RoHS Compliant
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
192 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN4 - SOCKET TRANS ICE 28QFN W/CABLEAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16F73I/ML
G
H
1997 Microchip Technology Inc.
GIO
General Input/Output
GPIO
General Purpose Input/Output
GPR
General Purpose Register (RAM). A portion of the data memory that can be used to store the
program’s dynamic variables.
Harvard Architecture
In this architecture the Program Memory and Data Memory buses are separated. This allows
concurrent accesses to Data Memory and Program Memory, which increases the performance
of the device.
Holding Capacitor
This is a capacitor in the Analog to Digital (A/D) module which “holds” to analog input level once
the conversion is started. During acquisition, the holding capacitor is charged/discharged by the
voltage level on the analog input pin. Once the conversion is started, the holding capacitor is dis-
connected from the analog input and “holds” this voltage for the A/D conversion.
HS
High Speed. One of the device oscillator modes. The oscillator circuit is tuned to support the high
frequency operation. Used for operation from 4 MHz to 20 MHz.
Glossary
DS31035A-page 35-5
35

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