ATMEGA645P-MU Atmel, ATMEGA645P-MU Datasheet - Page 90
ATMEGA645P-MU
Manufacturer Part Number
ATMEGA645P-MU
Description
IC MCU AVR 64K FLASH 64QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA645P-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.4
13.4.1
13.4.2
13.4.3
13.4.4
13.4.5
13.4.6
13.4.7
90
Register Description
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
MCUCR – MCU Control Register
PORTA – Port A Data Register
DDRA – Port A Data Direction Register
PINA – Port A Input Pins Address
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
PINB – Port B Input Pins Address
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 69
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
0x02 (0x22)
Read/Write
Initial Value
Bit
0x01 (0x21)
Read/Write
Initial Value
Bit
0x00 (0x20)
Read/Write
Initial Value
Bit
0x05 (0x25)
Read/Write
Initial Value
Bit
0x04 (0x24)
Read/Write
Initial Value
Bit
0x03 (0x23)
Read/Write
Initial Value
PORTB7
PORTA7
PINA7
PINB7
DDA7
DDB7
JTD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
7
0
7
0
7
0
7
7
0
7
0
7
PORTB6
PORTA6
BODS
PINA6
PINB6
DDA6
DDB6
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R
6
0
6
0
6
0
6
6
0
6
0
6
for more details about this feature.
PORTB5
PORTA5
PINA5
PINB5
BODSE
DDA5
DDB5
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
5
0
5
0
5
5
0
5
0
5
R
5
0
PORTA4
PORTB4
PINA4
PINB4
DDA4
DDB4
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
4
0
4
0
4
4
0
4
0
4
PUD
R/W
4
0
PORTA3
PORTB3
PINA3
PINB3
DDA3
DDB3
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
3
0
3
0
3
3
0
3
0
3
R
3
–
0
PORTA2
PORTB2
PINA2
PINB2
DDB2
DDA2
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
2
0
2
0
2
2
0
2
0
2
R
2
–
0
PORTA1
PORTB1
PINA1
PINB1
DDA1
DDB1
IVSEL
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
R/W
1
0
1
0
1
1
0
1
0
1
1
0
PORTB0
PORTA0
PINA0
PINB0
DDA0
DDB0
IVCE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
N/A
N/A
0
0
0
0
0
0
0
0
0
0
0
0
8285B–AVR–03/11
MCUCR
PORTA
PORTB
DDRA
DDRB
PINA
PINB
”Con-
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