ATMEGA1284-AU Atmel, ATMEGA1284-AU Datasheet - Page 193
ATMEGA1284-AU
Manufacturer Part Number
ATMEGA1284-AU
Description
IC MCU AVR 128K FLASH 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA1284-AU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA1284-AU
Manufacturer:
ATMEL
Quantity:
1 200
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8272A–AVR–01/10
• Bits 5:4 – UPMn1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The
Receiver will generate a parity value for the incoming data and compare it to the UPMn setting.
If a mismatch is detected, the UPEn Flag in UCSRnA will be set.
Table 18-5.
• Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
Table 18-6.
• Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use.
Table 18-7.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
UCSZn2
UPMn1
0
0
0
0
1
1
1
1
0
0
1
1
UPMn Bits Settings
USBS Bit Settings
UCSZn Bits Settings
USBSn
0
1
UCSZn1
UPMn0
0
0
1
1
0
0
1
1
0
1
0
1
Stop Bit(s)
1-bit
2-bit
Parity Mode
Disabled
Reserved
Enabled, Even Parity
Enabled, Odd Parity
UCSZn0
0
1
0
1
0
1
0
1
Character Size
5-bit
6-bit
7-bit
8-bit
Reserved
Reserved
Reserved
9-bit
193
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