ATMEGA162-16AUR Atmel, ATMEGA162-16AUR Datasheet - Page 156

MCU AVR 16KB FLASH 16MHZ 44TQFP

ATMEGA162-16AUR

Manufacturer Part Number
ATMEGA162-16AUR
Description
MCU AVR 16KB FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162-16AUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA162-16AUR
Manufacturer:
Atmel
Quantity:
10 000
Timer/Counter
Prescaler
Special Function IO
Register – SFIOR
156
ATmega162/V
Figure 70. Prescaler for Timer/Counter2
The clock source for Timer/Counter2 is named clk
system I/O clock clk
clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real Time Counter
(RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from Port D. A crystal can
then be connected between the TOSC1 and TOSC2 pins to serve as an independent clock
source for Timer/Counter2. The Oscillator is optimized for use with a 32.768 kHz crystal. Apply-
ing an external clock source to TOSC1 is not recommended.
For Timer/Counter2, the possible prescaled selections are: clk
clk
Setting the PSR2 bit in SFIOR resets the prescaler. This allows the user to operate with a pre-
dictable prescaler.
• Bit 1 – PSR2: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally cleared
immediately by hardware. If this bit is written when Timer/Counter2 is operating in asynchronous
mode, the bit will remain one until the prescaler has been reset. The bit will not be cleared by
hardware if the TSM bit is set. Refer to the description of the
chronization Mode” on page 105
Bit
Read/Write
Initial Val-
ue
T2S
TOSC1
clk
/128, clk
PSR2
CS20
CS21
CS22
AS2
I/O
TSM
R/W
T2S
7
0
/256, and clk
XMBK
IO
R/W
6
0
. By setting the AS2 bit in ASSR, Timer/Counter2 is asynchronously
clk
T2S
XMM2
T2S
R/W
5
0
/1024. Additionally, clk
for a description of the Timer/Counter Synchronization mode.
Clear
XMM1
R/W
4
0
TIMER/COUNTER2 CLOCK SOURCE
XMM0
R/W
3
0
T2S
0
. clk
10-BIT T/C PRESCALER
T2S
PUD
R/W
T2S
2
0
clk
as well as 0 (stop) may be selected.
T2
is by default connected to the main
“Bit 7 – TSM: Timer/Counter Syn-
PSR2
R/W
1
0
T2S
/8, clk
PSR310
R/W
0
0
T2S
/32, clk
SFIOR
2513K–AVR–07/09
T2S
/64,

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