PIC16F87-E/SS Microchip Technology, PIC16F87-E/SS Datasheet - Page 427
![IC MCU FLASH 4KX14 EEPROM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F87-E/SS
Manufacturer Part Number
PIC16F87-E/SS
Description
IC MCU FLASH 4KX14 EEPROM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F87-IP.pdf
(228 pages)
5.PIC16F87-IP.pdf
(8 pages)
6.PIC16F87-IP.pdf
(4 pages)
7.PIC16F87-IP.pdf
(8 pages)
8.PIC16F87-IP.pdf
(24 pages)
Specifications of PIC16F87-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F87-IP PDF datasheet #4
- PIC16F87-IP PDF datasheet #5
- PIC16F87-IP PDF datasheet #6
- PIC16F87-IP PDF datasheet #7
- PIC16F87-IP PDF datasheet #8
- Current page: 427 of 688
- Download datasheet (3Mb)
23.3
1997 Microchip Technology Inc.
Operation
The ADRESH:ADRESL registers contains the 10-bit result of the A/D conversion. When the A/D
conversion is complete, the result is loaded into this A/D result register pair, the GO/DONE bit
(ADCON0<2>) is cleared, and A/D interrupt flag bit, ADIF, is set. The block diagrams of the A/D
module are shown in
After the A/D module has been configured as desired, the selected channel must be acquired
before the conversion is started. The analog input channels must have their corresponding TRIS
bits selected as inputs. To determine sample time, see Subsection
Requirements.”
following steps should be followed for doing an A/D conversion:
1.
2.
3.
4.
5.
6.
7.
Figure 23-2
time that the A/D module’s holding capacitor is connected to the external voltage level. Then
there is the conversion time of 12 T
two times is the sampling time. There is a minimum acquisition time to ensure that the holding
capacitor is charged to a level that will give the desired accuracy for the A/D conversion.
Figure 23-2: A/D Conversion Sequence
Configure the A/D module:
• Configure analog pins / voltage reference/ and digital I/O (ADCON1)
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON0)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear the ADIF bit
• Set the ADIE bit
• Set the GIE bit
Wait the required acquisition time.
Start conversion:
• Set the GO/DONE bit (ADCON0)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared or ADIF bit to be set
OR
• Waiting for the A/D interrupt
Read A/D Result register pair (ADRESH:ADRESL), clear the ADIF bit, if required.
For next conversion, go to step 1 or step 2 as required.
When A/D holding capacitor starts to charge.
After A/D conversion, or when new A/D channel is selected
Acquisition Time
Section 23. 10-bit A/D Converter
shows the conversion sequence, and the terms that are used. Acquisition time is the
After this acquisition time has elapsed the A/D conversion can be started. The
Figure
A/D Sample Time
Preliminary
When A/D conversion is started (setting the GO bit)
23-1.
A/D Conversion Time
AD
, which is started when the GO bit is set. The sum of these
A/D conversion complete,
result is loaded in ADRES register.
Holding capacitor begins acquiring
voltage level on selected channel
ADIF bit is set
23.4 “A/D Acquisition
DS31023A-page 23-5
23
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