PIC16C72AT-04/SS Microchip Technology, PIC16C72AT-04/SS Datasheet - Page 15

• Manufacturer Part Number: PIC16C72AT-04/SS
• Description: IC MCU OTP 2KX14 A/D PWM 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C72AT-04/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• For Use With: 309-1025 - ADAPTER 28-SSOP TO 28-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.2.2.5
This register contains the individual flag bits for the
Peripheral interrupts.
REGISTER 2-5:
bit7
1999 Microchip Technology Inc.
bit 7:
bit 6:
bit 5-4: Unimplemented: Read as ‘0’
bit 3:
bit 2:
bit 1:
bit 0:
Note 1: The PIC16C62B does not have an A/D module. This bit location is reserved on these devices. Always maintain this
U-0
—
PIR1 REGISTER
Unimplemented: Read as ‘0’
ADIF
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
SSPIF: Synchronous Serial Port Interrupt Flag bit
1 = The transmission/reception is complete (must be cleared in software)
0 = Waiting to transmit/receive
CCP1IF: CCP1 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused in this mode
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1 = TMR2 to PR2 match occurred (must be cleared in software)
0 = No TMR2 to PR2 match occurred
TMR1IF: TMR1 Overflow Interrupt Flag bit
1 = TMR1 register overflowed (must be cleared in software)
0 = TMR1 register did not overflow
bit clear.
ADIF
R/W-0
(1)
(1)
: A/D Converter Interrupt Flag bit
PIR1 REGISTER (ADDRESS 0Ch)
U-0
—
U-0
—
SSPIF
R/W-0
Preliminary
CCP1IF
R/W-0
TMR2IF
R/W-0
Note:
TMR1IF
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
R/W-0
PIC16C62B/72A
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
read as ‘0’
DS35008B-page 15