PIC16C72A-20/SO Microchip Technology, PIC16C72A-20/SO Datasheet - Page 17
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PIC16C72A-20/SO
Manufacturer Part Number
PIC16C72A-20/SO
Description
IC MCU OTP 2KX14 A/D PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C62B-04SO.pdf
(120 pages)
4.PIC16C72A-04SP.pdf
(6 pages)
Specifications of PIC16C72A-20/SO
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Interface
I2C, SPI
Embedded Interface Type
I2C, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C72A-20/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.3
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13 bits
wide. The low byte is called the PCL register and is
readable and writable. The high byte is called the PCH
register. This register contains the PC<12:8> bits and
is not directly accessible. All updates to the PCH regis-
ter go through the PCLATH register.
2.3.1
The stack allows any combination of up to 8 program
calls and interrupts to occur. The stack contains the
return address from this branch in program execution.
Mid-range devices have an 8 level deep hardware
stack. The stack space is not part of either program or
data space and the stack pointer is not accessible. The
PC is PUSHed onto the stack when a CALL instruction
is executed or an interrupt causes a branch. The stack
is POPed in the event of a RETURN, RETLW or a RET-
FIE instruction execution. PCLATH is not modified
when the stack is PUSHed or POPed.
After the stack has been PUSHed eight times, the ninth
push overwrites the value that was stored from the first
push. The tenth push overwrites the second push (and
so on).
1999 Microchip Technology Inc.
PCL and PCLATH
STACK
Preliminary
2.4
The CALL and GOTO instructions provide 11 bits of
address to allow branching within any 2K program
memory page. When doing a CALL or GOTO instruction,
the upper bit of the address is provided by
PCLATH<3>. The user must ensure that the page
select bit is programmed to address the proper pro-
gram memory page. If a return from a CALL instruction
(or interrupt) is executed, the entire 13-bit PC is popped
from the stack. Therefore, manipulation of the
PCLATH<3> bit is not required for the return instruc-
tions.
Program Memory Paging
PIC16C62B/72A
DS35008B-page 17