ATMEGA324PA-AUR Atmel, ATMEGA324PA-AUR Datasheet - Page 49

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ATMEGA324PA-AUR

Manufacturer Part Number
ATMEGA324PA-AUR
Description
MCU AVR 32KB FLASH 20 MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA324PA-AUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA324PA-AUR
Manufacturer:
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Quantity:
10 000
9.12.2
9.12.3
8152G–AVR–11/09
MCUCR – MCU Control Register
PRR – Power Reduction Register
• Bit 6 – BODS: BOD Sleep
The BODS bit must be written to logic one in order to turn off BOD during sleep, see
on page
BODSE in MCUCR. To disable BOD in relevant sleep modes, both BODS and BODSE must first
be set to one. Then, to set the BODS bit, BODS must be set to one and BODSE must be set to
zero within four clock cycles.
The BODS bit is active three clock cycles after it is set. A sleep instruction must be executed
while BODS is active in order to turn off the BOD for the actual sleep mode. The BODS bit is
automatically cleared after three clock cycles.
• Bit 5 – BODSE: BOD Sleep Enable
BODSE enables setting of BODS control bit, as explained in BODS bit description. BOD disable
is controlled by a timed sequence.
• Bit 7 - PRTWI: Power Reduction TWI
Writing a logic one to this bit shuts down the TWI by stopping the clock to the module. When
waking up the TWI again, the TWI should be re initialized to ensure proper operation.
• Bit 6 - PRTIM2: Power Reduction Timer/Counter2
Writing a logic one to this bit shuts down the Timer/Counter2 module in synchronous mode (AS2
is 0). When the Timer/Counter2 is enabled, operation will continue like before the shutdown.
• Bit 5 - PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
• Bit 4 - PRUSART1: Power Reduction USART1
Writing a logic one to this bit shuts down the USART1 by stopping the clock to the module.
When waking up the USART1 again, the USART1 should be reinitialized to ensure proper
operation.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing a logic one to this bit shuts down the Timer/Counter1 module. When the Timer/Counter1
is enabled, operation will continue like before the shutdown.
Bit
0x35 (0x55)
Read/Write
Initial Value
Bit
(0x64)
Read/Write
Initial Value
43. Writing to the BODS bit is controlled by a timed sequence and an enable bit,
PRTWI
R/W
JTD
R/W
7
0
7
0
PRTIM2
R/W
BODS
6
0
R
6
0
ATmega164PA/324PA/644PA/1284P
PRTIM0
R/W
BODSE
5
0
R
5
0
PRUSART1
R/W
4
0
PUD
R/W
0
4
PRTIM1
R/W
3
0
R
3
0
PRSPI
R/W
2
0
R
2
0
PRUSART0
IVSEL
R/W
R/W
1
0
1
0
IVCE
R/W
PRADC
0
0
R/W
0
0
Table 9-1
MCUCR
PRR
49

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