ATMEGA324PA-AUR Atmel, ATMEGA324PA-AUR Datasheet - Page 242

• Manufacturer Part Number: ATMEGA324PA-AUR
• Description: MCU AVR 32KB FLASH 20 MHZ 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA324PA-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22. ADC - Analog-to-digital Converter
22.1
22.2
8152G–AVR–11/09
Features
Overview
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Note:
The ATmega164PA/324PA/644PA/1284P features a 10-bit successive approximation ADC. The
ADC is connected to an 8-channel Analog Multiplexer which allows 8 single-ended voltage
inputs constructed from the pins of Port A. The single-ended voltage inputs refer to 0V (GND).
The device also supports 16 differential voltage input combinations. Two of the differential inputs
(ADC1, ADC0 and ADC3, ADC2) are equipped with a programmable gain stage. This provides
amplification steps of 0 dB (1x), 20 dB (10x), or 46 dB (200x) on the differential input voltage
before the A/D conversion. Seven differential analog input channels share a common negative
terminal (ADC1), while any other ADC input can be selected as the positive input terminal. If 1x
or 10x gain is used, 8-bit resolution can be expected. If 200x gain is used, 6-bit resolution can be
expected. Note that internal references of 1.1V should not be used on 10x and 200x gain.
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
on page
The ADC has a separate analog supply voltage pin, AVCC. AVCC must not differ more than
±0.3 V from V
pin.
Internal reference voltages of nominally 1.1V, 2.56V or AVCC are provided On-chip. The voltage
reference may be externally decoupled at the AREF pin by a capacitor for better noise perfor-
mance. If V
ended channels.
10-bit Resolution
0.5 LSB Integral Non-linearity
±2 LSB Absolute Accuracy
13 - 260 µs Conversion Time
Up to 15 kSPS at Maximum Resolution
8 Multiplexed Single Ended Input Channels
Differential mode with selectable gain at 1x, 10x or 200x
Optional Left adjustment for ADC Result Readout
0 - V
2.7 - V
Selectable 2.56V or 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
CC
1. The differential input channels are not tested for devices in PDIP Package. This feature is only
243.
ADC Input Voltage Range
Differential ADC Voltage Range
guaranteed to work for devices in TQFP, VQFN/QFN/MLF, VFBGA and DRQFN Packages.
CC
CC
is below 2.1V, internal voltage reference of 1.1V should not be used on single
. See the paragraph
ATmega164PA/324PA/644PA/1284P
”ADC Noise Canceler” on page 250
on how to connect this
Figure 22-1
242