DSPIC30F2011-20E/P Microchip Technology, DSPIC30F2011-20E/P Datasheet - Page 46
![IC DSPIC MCU/DSP 12K 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
DSPIC30F2011-20E/P
Manufacturer Part Number
DSPIC30F2011-20E/P
Description
IC DSPIC MCU/DSP 12K 18DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
Specifications of DSPIC30F2011-20E/P
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
For Use With
AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
TABLE 11-8:
DS70102K-page 46
Step 5: Set the read pointer (W6) and load the (next set of) write latches.
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Step 6: Repeat steps 4-5 eight times to load the write latches for 32 instructions.
Step 7: Unlock the NVMCON for writing.
0000
0000
0000
0000
Step 8: Initiate the write cycle.
0000
0000
0000
—
0000
0000
0000
0000
0000
Step 9: Reset device internal PC.
0000
0000
Step 10: Repeat steps 2-9 until all code memory is programmed.
Command
(Binary)
EB0300
000000
BB0BB6
000000
000000
BBDBB6
000000
000000
BBEBB6
000000
000000
BB1BB6
000000
000000
BB0BB6
000000
000000
BBDBB6
000000
000000
BBEBB6
000000
000000
BB1BB6
000000
000000
200558
883B38
200AA9
883B39
A8E761
000000
000000
—
000000
000000
A9E761
000000
000000
040100
000000
(Hexadecimal)
SERIAL INSTRUCTION EXECUTION FOR WRITING CODE MEMORY (CONTINUED)
Data
CLR
NOP
TBLWTL
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTL
NOP
NOP
TBLWTL
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTH.B
NOP
NOP
TBLWTL
NOP
NOP
MOV
MOV
MOV
MOV
BSET
NOP
NOP
Externally time ‘P12a’ ms (see
Timing
NOP
NOP
BCLR
NOP
NOP
GOTO 0x100
NOP
Requirements”)
W6
[W6++], [W7]
[W6++], [W7++]
[W6++], [++W7]
[W6++], [W7++]
[W6++], [W7]
[W6++], [W7++]
[W6++], [++W7]
[W6++], [W7++]
#0x55, W8
W8, NVMKEY
#0xAA, W9
W9, NVMKEY
NVMCON, #WR
NVMCON, #WR
Description
Section 13.0 “AC/DC Characteristics and
© 2010 Microchip Technology Inc.