PIC16LF627A-I/ML Microchip Technology, PIC16LF627A-I/ML Datasheet - Page 117
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PIC16LF627A-I/ML
Manufacturer Part Number
PIC16LF627A-I/ML
Description
IC MCU FLASH 1KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF627A-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
15.0
Each PIC16F627A/628A/648A instruction is a 14-bit
word divided into an OPCODE which specifies the
instruction type and one or more operands which
further specify the operation of the instruction. The
PIC16F627A/628A/648A instruction set summary in
Table 15-2 lists byte-oriented, bit-oriented, and
literal and control operations. Table 15-1 shows the
opcode field descriptions.
For byte-oriented instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator which selects the number of the bit affected
by the operation, while ‘f’ represents the number of the
file in which the bit is located.
For literal and control operations, ‘k’ represents an
eight or eleven bit constant or literal value.
15.1
Any instruction that specifies a file register as part of
the instruction performs a Read-Modify-Write (R-M-W)
operation. The register is read, the data is modified,
and the result is stored according to either the instruc-
tion, or the destination designator ‘d’. A read operation
is performed on a register even if the instruction writes
to that register.
For example, a “clrf PORTB” instruction will read
PORTB, clear all the data bits, then write the result
back to PORTB. This example would have the unin-
tended result that the condition that sets the RBIF flag
would be cleared for pins configured as inputs and
using the PORTB interrupt-on-change feature.
TABLE 15-1:
© 2009 Microchip Technology Inc.
f
W
b
k
x
d
TO
PD
Field
INSTRUCTION SET SUMMARY
Read-Modify-Write Operations
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don’t care location (= 0 or 1)
The assembler will generate code with x = 0. It is the
recommended form of use for compatibility with all
Microchip software tools.
Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1
Time-out bit
Power-down bit
OPCODE FIELD
DESCRIPTIONS
Description
PIC16F627A/628A/648A
The instruction set is highly orthogonal and is grouped
into three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
All instructions are executed within one single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of an
instruction. In this case, the execution takes two
instruction cycles with the second cycle executed as a
NOP. One instruction cycle consists of four oscillator
periods. Thus, for an oscillator frequency of 4 MHz, the
normal instruction execution time is 1 μs. If a
conditional test is true or the program counter is
changed as a result of an instruction, the instruction
execution time is 2 μs.
Table 15-2 lists the instructions recognized by the
MPASM™ assembler.
Figure 15-1 shows the three general formats that the
instructions can have.
All examples use the following format to represent a
hexadecimal number:
where ‘h’ signifies a hexadecimal digit.
FIGURE 15-1:
Note 1: Any unused opcode is reserved. Use of
Byte-oriented file register operations
Bit-oriented file register operations
Literal and control operations
General
CALL and GOTO instructions only
13
13
13
13
2: To maintain upward compatibility with
0xhh
d = 0 for destination W
d = 1 for destination f
f = 7-bit file register address
b = 3-bit bit address
f = 7-bit file register address
k = 8-bit immediate value
k = 11-bit immediate value
OPCODE
OPCODE
OPCODE
any reserved opcode may cause unex-
pected operation.
future PIC MCU products, do not use the
OPTION and TRIS instructions.
OPCODE
11 10
GENERAL FORMAT FOR
INSTRUCTIONS
10 9
8
b (BIT #)
d
7
8 7
k (literal)
6
7
6
f (FILE #)
DS40044G-page 117
k (literal)
f (FILE #)
0
0
0
0