PIC12C671-04I/P Microchip Technology, PIC12C671-04I/P Datasheet - Page 327
PIC12C671-04I/P
Manufacturer Part Number
PIC12C671-04I/P
Description
IC MCU OTP 1KX14 A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C671-04I/P
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
1
Operating Supply Voltage
3 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Figure 17-35: Bus Collision During Start Condition (SDA only)
Figure 17-36: Bus Collision During Start Condition (SCL = 0)
1997 Microchip Technology Inc.
SDA
SCL
SEN
S
BCLIF
SSPIF
SDA
SCL
SEN
S
BCLIF
SSPIF
'0'
'0'
SCL = 0 before BRG time out,
Bus collision occurs, Set BCLIF.
Set SEN, enable start
sequence if SDA = 1, SCL = 1
condition if SDA = 1, SCL=1
Set SEN, enable start
SDA sampled low before
START condition.
S bit and SSPIF set because
SDA = 0, SCL = 1
. Set BCLIF,
SDA goes low before the SEN bit is set.
S bit and SSPIF set because
SDA = 0, SCL = 1
SDA = 0, SCL = 1
Set BCLIF.
T
BRG
Preliminary
T
BRG
SSPIF and BCLIF are
cleared in software.
SEN cleared automatically because of bus collision.
SSP module reset into idle state.
SCL = 0 before SDA = 0,
Bus collision occurs, Set BCLIF.
Section 17. MSSP
SSPIF and BCLIF are
cleared in software.
Interrupts cleared
in software.
'0'
'0'
DS31017A-page 17-51
17
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