PIC16LC770-I/SS Microchip Technology, PIC16LC770-I/SS Datasheet - Page 36
![IC MCU OTP 2KX14 A/D PWM 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LC770-I/SS
Manufacturer Part Number
PIC16LC770-I/SS
Description
IC MCU OTP 2KX14 A/D PWM 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC770-I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16LC770I/SS
- Current page: 36 of 220
- Download datasheet (4Mb)
PIC16C717/770/771
REGISTER 3-2:
REGISTER 3-3:
DS41120B-page 34
bit 7-0
bit 7-0
WEAK PULL-UP PORTB REGISTER (WPUB: 95h)
INTERRUPT-ON-CHANGE PORTB REGISTER (IOCB: 96h)
bit 7
WPUB<7:0>: PORTB Weak Pull-Up Control bits
1 = Weak pull-up enabled
0 = Weak pull-up disabled
Legend:
R = Readable bit
- n = Value at POR
bit 7
IOCB<7:0>: Interrupt-on-Change PORTB Control bits
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Legend:
R = Readable bit
- n = Value at POR
WPUB7
Note:
IOCB7
R/W-1
R/W-1
Note 1: For the WPUB register setting to take effect, the RBPU bit in the OPTION_REG
2: The weak pull-up device is automatically disabled if the pin is in Output mode
The interrupt enable bits GIE and RBIE in the INTCON Register must be set for indi-
vidual interrupts to be recognized.
register must be cleared.
(TRIS = 0).
WPUB6
IOCB6
R/W-1
R/W-1
WPUB5
IOCB5
R/W-1
R/W-1
W = Writable bit
’1’ = Bit is set
W = Writable bit
’1’ = Bit is set
WPUB4
IOCB4
R/W-1
R/W-1
WPUB3
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
IOCB3
R/W-1
R/W-0
WPUB2
IOCB2
R/W-1
R/W-0
2002 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WPUB1
IOCB1
R/W-1
R/W-0
WPUB0
IOCB0
R/W-1
R/W-0
bit 0
bit 0
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