PIC12CE674-10I/P Microchip Technology, PIC12CE674-10I/P Datasheet - Page 409
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PIC12CE674-10I/P
Manufacturer Part Number
PIC12CE674-10I/P
Description
IC MCU OTP 2KX14 A/D&EE 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(3 pages)
4.PIC12CE673-10P.pdf
(14 pages)
5.PIC12CE673-10P.pdf
(12 pages)
Specifications of PIC12CE674-10I/P
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE674-10I/P
Manufacturer:
MICROCHIP
Quantity:
12 000
- PIC16F688T-ISL PDF datasheet
- PIC12CE673-10P PDF datasheet #2
- PIC12CE673-10P PDF datasheet #3
- PIC12CE673-10P PDF datasheet #4
- PIC12CE673-10P PDF datasheet #5
- Current page: 409 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
Legend C
VA
Rs
V
I
R
SS
C
LEAKAGE
PIN
T
IC
HOLD
Section 22. Basic 8-bit A/D Converter
RAx
Figure 22-3:
C
5 pF
PIN
Note 1: The reference voltage (V
Note 2: The charge holding capacitor (C
Note 3: The maximum recommended impedance for analog sources is 10 k . This is
Note 4: After a conversion has completed, a 2.0 T
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
VARIOUS JUNCTIONS
out.
required to meet the pin leakage specification.
can begin again. During this time the holding capacitor is not connected to the
selected A/D input channel.
Analog Input Model
V
DD
V
V
T
T
= 0.6V
= 0.6V
REF
I leakage
500 nA
) has no effect on the equation, since it cancels itself
R
IC
HOLD
1k
) is not discharged after each conversion.
V
SS
DD
AD
Sampling
Switch
delay must complete before acquisition
6V
5V
4V
3V
2V
R
SS
Sampling Switch
5 6 7 8 9 10 11
V
SS
C
( k )
HOLD
= 51.2 pF
DS31022A-page 22-7
22
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