PIC16LF1936-I/SS Microchip Technology, PIC16LF1936-I/SS Datasheet - Page 281

IC PIC MCU FLASH 512KX14 28-SSOP

PIC16LF1936-I/SS

Manufacturer Part Number
PIC16LF1936-I/SS
Description
IC PIC MCU FLASH 512KX14 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16LF1936-I/SS

Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART, MI2C, SPI
Maximum Clock Frequency
32 KHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 14 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1936-I/SS
Manufacturer:
MICROCHI
Quantity:
20 000
23.6.13.3
Bus collision occurs during a Stop condition if:
a)
b)
FIGURE 23-38:
FIGURE 23-39:
 2009 Microchip Technology Inc.
After the SDA pin has been deasserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is deasserted, SCL is sampled
low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SDA
SCL
PEN
BCLIF
P
SSPIF
Bus Collision During a Stop
Condition
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDA asserted low
Assert SDA
T
BRG
T
BRG
Preliminary
T
BRG
T
BRG
The Stop condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPADD and
counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 23-37). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 23-38).
PIC16F193X/LF193X
SCL goes low before SDA goes high,
set BCLIF
T
BRG
T
BRG
SDA sampled
low after T
set BCLIF
’0’
’0’
DS41364D-page 281
’0’
’0’
BRG
,

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