PIC16C716-04/SS Microchip Technology, PIC16C716-04/SS Datasheet
PIC16C716-04/SS
Specifications of PIC16C716-04/SS
Related parts for PIC16C716-04/SS
PIC16C716-04/SS Summary of contents
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... CMOS Microcontrollers with A/D Converter and Capture/Compare/PWM Devices included in this Data Sheet: • PIC16C712 • PIC16C716 Microcontroller Core Features: • High-performance RISC CPU • Only 35 single word instructions to learn • All single cycle instructions except for program branches which are two cycle • ...
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... DIP, 18-pin DIP, 18-pin DIP, SOIC SOIC; SOIC; SOIC; 20-pin SSOP 20-pin SSOP 20-pin SSOP Preliminary PIC16C716 MHz POR, BOR (PWRT, OST) 2K 128 7 Ports A input channels PIC16C716 PIC16C72A PIC16C73B 128 128 128 192 TMR0 TMR0 TMR0 TMR1 TMR1 TMR1 TMR2 ...
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... However, we realize that we may have missed a few things. If you find any information that is missing or appears in error, please: • Fill out and mail in the reader response form in the back of this data sheet. • E-mail us at webmaster@microchip.com. We appreciate your assistance in making this a better document. 1999 Microchip Technology Inc. PIC16C712/716 To Our Valued Customers Preliminary DS41106A-page 3 ...
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... PIC16C712/716 NOTES: DS41106A-page 4 Preliminary 1999 Microchip Technology Inc. ...
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... Microchip Technology Inc. ommended reading for a better understanding of the device architecture and operation of the peripheral modules. There are two devices (PIC16C712, PIC16C716) cov- ered by this datasheet. Figure 1-1 is the block diagram for both devices. The pinouts are listed in Table 1-1. ...
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... OSC1, and denotes the instruction cycle rate. Digital I/O Analog input 0 Digital I/O Analog input 1 Digital I/O Analog input 2 Digital I/O Analog input 3 A/D Reference Voltage input. Digital I/O. Open drain when configured as output. Timer0 external clock input 1999 Microchip Technology Inc. ...
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... ST = Schmitt Trigger input with CMOS levels OD = Open drain output SM = SMBus compatible input. An external resistor is required if this pin is used as an output NPU = N-channel pull-up No-P diode = No P-diode input P = Power 1999 Microchip Technology Inc. Pin Buffer Type Type Description PORTB is a bi-directional I/O port. PORTB can be software programmed for internal weak pull-ups on all inputs ...
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... PIC16C712/716 NOTES: DS41106A-page 8 Preliminary 1999 Microchip Technology Inc. ...
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... The PIC16C712/716 has a 13-bit program counter capable of addressing program memory space. PIC16C712 has words of program memory and PIC16C716 has words of program memory. Accessing a location above the physically implemented address will cause a wraparound. The reset vector is at 0000h and the interrupt vector is at 0004h ...
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... T2CON PR2 92h 93h 94h CCPR1L 95h CCPR1H 96h CCP1CON 97h 98h 99h 9Ah 9Bh 9Ch 9Dh ADRES 9Eh ADCON0 ADCON1 9Fh General A0h Purpose General Registers BFh Purpose 32 Bytes Registers C0h 96 Bytes FFh Bank 0 Bank 1 1999 Microchip Technology Inc. ...
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... On any device reset, these pins are configured as inputs. 6: This is the value that will be in the port output latch. 7: Reserved bits; Do Not Use. 1999 Microchip Technology Inc. PIC16C712/716 The special function registers can be classified into two sets; core (CPU) and peripheral. Those registers asso- ciated with the core functions are described in detail in this section ...
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... TT1CK xxxx x1x1 xxxx x1x1 — — ---0 0000 ---0 0000 INTF RBIF 0000 000x 0000 000u TMR2IE TMR1IE -0-- -000 -0-- -000 — — POR BOR ---- --qq ---- --uu — — 1111 1111 1111 1111 — — PCFG1 PCFG0 ---- -000 ---- -000 1999 Microchip Technology Inc. ...
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... Note: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1999 Microchip Technology Inc. PIC16C712/716 It is recommended, therefore, that only BCF, BSF, ...
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... To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 128 Preliminary R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... RBIF: RB Port Change Interrupt Flag bit least one of the RB7:RB4 pins changed state (must be cleared in software None of the RB7:RB4 pins have changed state 1999 Microchip Technology Inc. PIC16C712/716 Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... Disables the TMR1 overflow interrupt DS41106A-page 16 Note: Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. R/W-0 R/W-0 R/W-0 R/W-0 CCP1IE TMR2IE TMR1IE — bit0 Preliminary R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... No TMR2 to PR2 match occurred bit 0: TMR1IF: TMR1 Overflow Interrupt Flag bit 1 = TMR1 register overflowed (must be cleared in software TMR1 register did not overflow 1999 Microchip Technology Inc. PIC16C712/716 Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... BOR must then be set by the user and checked on subsequent resets to see clear, indicating a brown-out has occurred. U-0 U-0 R/W-0 R/W-q — — POR BOR bit0 Preliminary R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... After the stack has been PUSHed eight times, the ninth push overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on). 1999 Microchip Technology Inc. PIC16C712/716 2.4 Program Memory Paging The CALL and GOTO instructions provide 11 bits of address to allow branching within any 2K program memory page ...
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... Bank 1 Bank 2 Bank 3 Preliminary HOW TO CLEAR RAM USING INDIRECT ADDRESSING 0x20 ;initialize pointer FSR ; to RAM INDF ;clear INDF register FSR ;inc pointer FSR,4 ;all done? NEXT ;NO, clear next ;YES, continue Indirect Addressing 7 FSR register 0 location select 1999 Microchip Technology Inc. ...
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... WR TRIS RD PORT To A/D Converter 1998 Microchip Technology Inc. Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and an open drain output. All other RA port pins have TTL input levels and full CMOS output drivers ...
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... Output is open drain type Bit 2 Bit 1 (1) — RA4 RA3 RA2 RA1 (1) — PORTA Data Direction Register — — — PCFG2 PCFG1 PCFG0 Preliminary Value on Value on all Bit 0 POR, other resets BOR RA0 --xx xxxx --xu uuuu --11 1111 --11 1111 ---- -000 ---- -000 1998 Microchip Technology Inc. ...
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... WR TRIS RB0/INT Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). 1999 Microchip Technology Inc. PIC16C712/716 Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-ups. This is per- formed by clearing bit RBPU (OPTION_REG< ...
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... PORTB is only used for the interrupt on change feature. Polling of PORTB is not recommended while using the interrupt on change feature. (1) RBPU T1OSCEN T1CS V DD weak P pull- TTL Buffer 0 T1CLKIN ST Buffer Preliminary V DD RB1/T1OSO/T1CKI V SS 1999 Microchip Technology Inc. ...
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... DATACCP TRISCCP<2> TRISCCP CCP Output Mode PORTB<3> PORTB TRISB<3> TRISB CCPON RD PORTB 1999 Microchip Technology Inc. PIC16C712/716 V DD weak P V pull- TTL Buffer (1) RBPU CCPON weak P pull- Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) TTL Buffer and clear the RBPU bit (OPTION_REG<7>). ...
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... Input/output pin (with interrupt on change). Internal software programmable weak pull-up. Input/output pin (with interrupt on change). Internal software programmable weak pull-up. Serial programming clock. Input/output pin (with interrupt on change). Internal software programmable weak pull-up. Serial programming data. Preliminary DD I/O pin 1999 Microchip Technology Inc. ...
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... Bit 6 06h PORTB RB7 RB6 86h TRISB PORTB Data Direction Register 81h OPTION_REG RBPU INTEDG Legend unknown unchanged. Shaded cells are not used by PORTB. 1999 Microchip Technology Inc. PIC16C712/716 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RB5 RB4 RB3 RB2 RB1 RB0 ...
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... PIC16C712/716 NOTES: DS41106A-page 28 Preliminary 1999 Microchip Technology Inc. ...
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... T0SE (1) T0CS Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). 1999 Microchip Technology Inc. PIC16C712/716 Additional information on external clock requirements is available in the PICmicro™ Mid-Range Reference Manual, (DS33023). 4.2 Prescaler ...
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... PORTA Data Direction Register Preliminary Data Bus 8 TMR0 reg Set flag bit T0IF on Overflow Value on: Value on all Bit 0 POR, other resets BOR xxxx xxxx uuuu uuuu RBIF 0000 000x 0000 000u PS0 1111 1111 1111 1111 --11 1111 --11 1111 1999 Microchip Technology Inc. ...
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... External clock from pin RB1/T1OSO/T1CKI (on the rising edge Internal clock (F /4) OSC bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 1999 Microchip Technology Inc. PIC16C712/716 5.1 Timer1 Operation Timer1 can operate in one of these modes: • timer • synchronous counter • asynchronous counter The operating mode is determined by the clock select bit, TMR1CS (T1CON< ...
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... Table 5-1 shows the details of Timer1 mode selections, control bit settings, TMR1 and PORTB operations. DS41106A-page 32 0 TMR1L 1 TMR1ON T1SYNC on/off 1 Prescaler T1OSCEN F /4 OSC Enable Internal 0 (1) Oscillator Clock 2 T1CKPS1:T1CKPS0 TMR1CS to the Preliminary Synchronized clock input Synchronize det SLEEP input 1999 Microchip Technology Inc. ...
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... T1CON = --xx 0x01 External circuit T1CON = --xx 0x11 TR1SCCP = ---- -x-1 Firmware T1CON = --xx 0x11 TR1SCCP = ---- -x-0 Counter Timer1 oscillator T1CON = --xx 1x11 1999 Microchip Technology Inc. PIC16C712/716 TMR1 Module Operation Off PORTB<2:1> function as normal I/O TMR1 module uses the main PORTB<2:1> function as normal oscillator as clock source. ...
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... TCCP — Preliminary Value on Value on Bit 0 POR, all other BOR resets 0000 000x 0000 000u RBIF -0-- -000 -0-- -000 TMR1IF -0-- -000 -0-- -000 TMR1IE xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu ---- -x-x ---- -u-u DT1CK ---- -1-1 ---- -1-1 TT1CK 1999 Microchip Technology Inc. ...
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... NOTES: 1999 Microchip Technology Inc. PIC16C712/716 Preliminary DS41106A-page 35 ...
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... Figure 6 simplified block diagram of the Timer2 module. Additional information on timer modules is available in the PICmicro™ (DS33023). R/W-0 R/W-0 R/W-0 R/W-0 bit0 F /4 OSC 2 Preliminary Mid-Range Reference Manual Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... PR2 Timer2 Period Register Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by the Timer2 module. 1999 Microchip Technology Inc. PIC16C712/716 6.2 Timer2 Interrupt The Timer2 module has an 8-bit period register PR2. Timer2 increments from 00h until it matches PR2 and then resets to 00h on the next increment cycle ...
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... PIC16C712/716 NOTES: DS41106A-page 38 Preliminary 1999 Microchip Technology Inc. ...
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... Reserved bit; Do Not Use bit 0: TT1CK - Tri state control bit for T1CKI pin 0 = T1CKI pin is an output 1 = T1CKI pin is an input 1999 Microchip Technology Inc. PIC16C712/716 Additional information on the CCP module is available in the PICmicro™ Mid-Range Reference Manual, (DS33023). TABLE 7-1 ...
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... EXAMPLE 7-1: CLRF CCP1CON MOVLW NEW_CAPT_PS MOVWF CCP1CON CCPR1L TMR1L Preliminary CHANGING BETWEEN CAPTURE PRESCALERS ;Turn CCP module off ;Load the W reg with ; the new prescaler ; mode value and CCP ON ;Load CCP1CON with this ; value 1999 Microchip Technology Inc. ...
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... PIE1 — ADIE Legend unknown unchanged unimplemented read as ’0’. Shaded cells are not used by Capture and Timer1. 1999 Microchip Technology Inc. 7.2.1 CCP PIN CONFIGURATION The user must configure the RB3/CCP1 pin as the CCP output by clearing the TRISCCP<2> bit. Note: ...
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... PWM period the CCP1 pin will not be cleared. For an example PWM period and duty cycle calcula- tion, see the PICmicro™ Mid-Range Reference Manual, (DS33023). Preliminary • OSC (TMR2 prescale value) Tosc • (TMR2 prescale value OSC log F PWM bits log(2) 1999 Microchip Technology Inc. ...
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... ADIE 92h PR2 Timer2 module’s period register Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by PWM and Timer2. 1999 Microchip Technology Inc. PIC16C712/716 1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz 0xFF ...
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... PORTB<3> functions as normal I/O. PORTB<3> always reads 0 when config- ured as input. If PORTB<3> is config- ured as output, reading PORTB<3> will read the data latch. Writing to PORTB<3> will always store the result in the data latch, but it does not drive the RB3/CCP1 pin. 1999 Microchip Technology Inc. ...
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... Unimplemented: Read as '0' bit 0: ADON: A/D On bit 1 = A/D converter module is operating 0 = A/D converter module is shutoff and consumes no operating current 1999 Microchip Technology Inc. PIC16C712/716 Additional information on the A/D module is available in the PICmicro™ (DS33023). The A/D module has three registers. These registers are: • ...
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... D 11x A = Analog input D = Digital I/O DS41106A-page 46 U-0 R/W-0 R/W-0 R/W-0 — PCFG2 PCFG1 PCFG0 RA1 RA2 RA3 V REF RA3 REF RA3 REF Preliminary R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... FIGURE 8-3: A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) 1999 Microchip Technology Inc. PIC16C712/716 1. Configure the A/D module: • Configure analog pins/voltage reference/ and digital I/O (ADCON1) • Select A/D input channel (ADCON0) • Select A/D conversion clock (ADCON0) • Turn on A/D module (ADCON0) 2 ...
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... LSb error is the maximum error allowed for the A/D to meet its specified accuracy Note: When the conversion is started, the hold- ing capacitor is disconnected from the ) SS input pin. ). The Sampling Switch leakage V = 0.6V T 500 Preliminary , see ACQ Mid-Range Reference Manual, C HOLD = DAC capacitance = 51 Sampling Switch (k ) 1999 Microchip Technology Inc. ...
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... For faster conversion times, the selection of another clock source is recommended. 4: When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for sleep operation only. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. 1999 Microchip Technology Inc. PIC16C712/716 8.3 Configuring Analog Port Pins ...
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... PCFG2 PCFG1 Preliminary Value on Value on all Bit 0 POR, other Resets BOR --xx xxxx --xu uuuu RA0 RBIF 0000 000x 0000 000u -0-- -000 xxxx xxxx uuuu uuuu — ADON 0000 00-0 0000 00-0 ---1 1111 ---1 1111 -0-- 0000 PCFG0 ---- -000 ---- -000 1999 Microchip Technology Inc. ...
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... The other is the Power-up Timer (PWRT), which provides a fixed delay on power-up only and is designed to keep 1999 Microchip Technology Inc. PIC16C712/716 the part in reset while the power supply stabilizes. With these two timers on-chip, most applications need no external reset circuitry ...
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... CP0 CP1 CP0 — bit13 bit 13-8, 5-4: CP1:CP0: Code Protection bits Code Protection for 2K Program memory (PIC16C716 Programming code protection off 10 = 0400h - 07FFh code protected 01 = 0200h - 07FFh code protected 00 = 0000h - 07FFh code protected bit 13-8, 5-4: Code Protection for 1K Program memory (PIC16C712) ...
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... RF varies with the crystal chosen. FIGURE 9-3: EXTERNAL CLOCK INPUT OPERATION (HS OSC CONFIGURATION) OSC1 Clock from ext. system PIC16C7XX Open OSC2 1999 Microchip Technology Inc. PIC16C712/716 TABLE 9-1 Ranges Tested: Mode XT 455 kHz 2.0 MHz 4.0 MHz HS 8.0 MHz 16.0 MHz These values are for design guidance only ...
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... A simplified block diagram of the on-chip reset circuit is shown in Figure 9-6. The PICmicro microcontrollers have a MCLR noise fil- ter in the MCLR reset path. The filter will detect and ignore small pulses. It should be noted that a WDT Reset does not drive MCLR pin low. Preliminary 1999 Microchip Technology Inc. ...
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... MCLR from external capacitor C in the event of MCLR/V PP down due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). 1999 Microchip Technology Inc. 9.5 Power-up Timer (PWRT) The Power-up Timer provides a fixed nominal time-out (parameter #33), on power-up only, from the POR. The Power-up Timer operates on an internal RC oscillator ...
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... Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. FIGURE 9-7: BROWN-OUT SITUATIONS V DD Internal Reset V DD Internal Reset V DD Internal Reset DS41106A-page 56 PWRT See Table 9-3 for time-out situations. Enable PWRT BODEN Enable OST 72 ms < Preliminary 1999 Microchip Technology Inc. S Chip_Reset BOR V BOR V BOR ...
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... Vss V DD RST This brown-out protection Microchip Technology’s MCP809 microcontroller DD supervisor. The MCP8XX and MCP1XX families of supervisors provide push-pull and open collector outputs with both high and low active reset pins. There are 7 different trip point selections to accommodate 5V and 3V systems 9 ...
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... Program STATUS Counter Register 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu uuu0 0uuu 000h 0001 1uuu ( uuu1 0uuu Preliminary Wake-up from SLEEP 1024T OSC OSC — PCON Register ---- --0x ---- --uu ---- --uu ---- --uu ---- --uu ---- --u0 ---- --uu 1999 Microchip Technology Inc. ...
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... When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 9-5 for reset value for specific condition any device reset, these pins are configured as inputs. 5: This is the value that will be in the port output latch. 1999 Microchip Technology Inc. PIC16C712/716 MCLR Resets WDT Reset ...
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... MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-13: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET DS41106A-page PWRT T OST T PWRT T OST T PWRT T OST Preliminary 1999 Microchip Technology Inc. ): CASE CASE 2 DD ...
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... CCP1IE TMR2IF TMR2IE TMR1IF TMR1IE 1999 Microchip Technology Inc. PIC16C712/716 The peripheral interrupt flags are contained in the spe- cial function registers, PIR1 and PIR2. The correspond- ing interrupt enable bits are contained in special function registers, PIE1 and PIE2, and the peripheral interrupt enable bit is contained in special function reg- ister, INTCON ...
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... The example: a) Stores the W register. b) Stores the STATUS register in bank 0. c) Stores the PCLATH register. d) Executes the interrupt service routine code (User-generated). e) Restores the STATUS register (and bank select bit). f) Restores the W and PCLATH registers. Preliminary 1999 Microchip Technology Inc. ...
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... N/A OPTION_REG Legend: Shaded cells are not used by the Watchdog Timer. Note 1: See Figure 9-1 for operation of these bits. 1999 Microchip Technology Inc. PIC16C712/716 WDT time-out period values may be found in the Elec- trical Specifications section under T #31). Values for the WDT prescaler (actually a postscaler, but shared with the Timer0 prescaler) may be assigned using the OPTION_REG register ...
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... SLEEP instruction completes. To determine whether a SLEEP instruction executed, test the PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruc- tion should be executed before a SLEEP instruction. Preliminary 1999 Microchip Technology Inc. ...
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... It is recom- mended that only the 4 least significant bits of the ID location are used. For ROM devices, these values are submitted along with the ROM code. 1999 Microchip Technology Inc. PIC16C712/716 (2) ...
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... PIC16C712/716 NOTES: DS41106A-page 66 Preliminary 1999 Microchip Technology Inc. ...
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... NOP. One instruc- tion cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction 1999 Microchip Technology Inc. PIC16C712/716 execution time conditional test is true or the program counter is changed as a result of an instruc- tion, the instruction execution time ...
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... Preliminary 1999 Microchip Technology Inc. Status Notes Affected LSb C,DC,Z 1,2 ffff Z 1,2 ffff Z 2 ffff Z 0011 Z 1,2 ffff Z 1,2 ffff 1,2,3 ffff Z ...
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... MPLAB-ICE 2000. This is a full-featured emulator system with enhanced trace, trigger, and data monitoring features. Both systems will operate across the entire operating speed range of the PICmicro MCU. 1999 Microchip Technology Inc. PIC16C712/716 11.3 ICEPIC: Low-Cost PICmicro In-Circuit Emulator ...
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... The PICDEM-3 provides an addi- tional RS-232 interface and Windows 3.1 software for showing the demultiplexed LCD signals on a PC. A sim- ple serial interface allows the user to construct a hard- ware demultiplexer for the LCD signals. Preliminary 1999 Microchip Technology Inc. ...
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... MPASM provides a rich directive language to support programming of the PICmicro. Directives are helpful in making the development of your assemble source code shorter and more maintainable. 1999 Microchip Technology Inc. PIC16C712/716 11.12 Software Simulator (MPLAB-SIM) The MPLAB-SIM Software Simulator allows code development host environment ...
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... Programming Tools K L evaluation and programming tools support EE OQ Microchips HCS Secure Data Products. The HCS eval- uation kit includes an LCD display to show changing codes, a decoder to decode transmissions, and a pro- gramming interface to program test transmitters. DS41106A-page 72 Preliminary 1999 Microchip Technology Inc. ...
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... Products Emulator Tools 1999 Microchip Technology Inc. PIC16C712/716 á á á á á á á á á á á á á á á á á ...
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... PIC16C712/716 NOTES: DS41106A-page 74 Preliminary 1999 Microchip Technology Inc. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1999 Microchip Technology Inc. (except V , MCLR, and RA4).......................................... -0. ...
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... Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 12-2: PIC16LC712/716 VOLTAGE-FREQUENCY GRAPH, 0°C < TA < +70°C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. DS41106A-page Frequency (MHz Frequency (MHz) Preliminary 1999 Microchip Technology Inc. ...
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... measurement This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will operate correctly to this trip point. 1999 Microchip Technology Inc. PIC16C712/716 Standard Operating Conditions (unless otherwise stated) Operating temperature 0°C -40°C -40°C Min Typ† ...
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... All temperatures 0 — 4 MHz All temperatures 0 — 20 MHz All temperatures , DD and Preliminary T +70°C for commercial A T +85°C for industrial A Conditions = 4 MHz 3.0V (Note kHz 3.0V, WDT disabled DD = 3.0V, WDT enabled 3.0V, WDT disabled + 3.0V, WDT disabled 1999 Microchip Technology Inc. ...
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... RC mode. 2: The leakage current on the MCLR/V levels represent normal operating conditions. Higher leakage current may be measured at different input volt- ages. 3: Negative current is defined as current sourced by the pin. 1999 Microchip Technology Inc. PIC16C712/716 Standard Operating Conditions (unless otherwise stated) Operating temperature 0°C T -40° ...
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... In XT, HS and LP modes when external clock is used to drive OSC1 pin is strongly dependent on the applied voltage level. The specified PP Preliminary +70°C for commercial A +85°C for industrial A +125°C for extended A Conditions = -3.0 mA 4.5V -2.5 mA 4.5V -1.3 mA 4.5V -1.0 mA 4.5V 1999 Microchip Technology Inc. ...
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... Frequency Lowercase letters (pp) and their meanings CCP1 ck CLKOUT SDI do SDO dt Data in io I/O port mc MCLR Uppercase letters and their meanings Fall H High I Invalid (Hi-impedance) L Low 1999 Microchip Technology Inc. PIC16C712/716 T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z Hi-impedance Preliminary ...
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... A -40°C T +85°C A -40°C T +125°C A range as described in DC spec Section 12.1 and Section 12.2. DD Load condition Pin 464 for all pins except OSC2/CLKOUT for OSC2 output Preliminary for commercial for industrial for extended 1999 Microchip Technology Inc. ...
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... All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKIN pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. 1999 Microchip Technology Inc. PIC16C712/716 Q1 ...
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... Max Units Conditions 75 200 ns Note 1 75 200 ns Note 1 35 100 ns Note 1 35 100 ns Note 1 — 0. Note 1 CY — — ns Note 1 — — ns Note 1 50 150 ns — — ns — — ns — — — — — — ns — — 1999 Microchip Technology Inc. ...
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... T Brown-out Reset Pulse Width BOR * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 1999 Microchip Technology Inc. PIC16C712/716 Min Typ† ...
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... N = prescale value (2, 4,..., 256) — ns Must also meet parameter 47 — ns — ns — ns — ns — ns Must also meet parameter 47 — ns — ns — ns — ns — prescale value ( prescale value ( — ns — ns 200 kHz 7Tosc — 1999 Microchip Technology Inc. ...
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... TccR CCP1 output rise time 54* TccF CCP1 output fall time * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 1999 Microchip Technology Inc. PIC16C712/716 Min Typ† ...
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... REF AIN REF — — AIN REF + 0 0 — A Average current consump- tion when A/D is on. — A (Note 1) A During V acquisition. AIN Based on differential charge HOLD AIN C , see Section 9.1. HOLD 10 A During A/D Conversion cycle 1999 Microchip Technology Inc. ...
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... Data in “Typ” column unless otherwise stated. These parameters are for design guidance only and are not tested. : § This specification ensured by design. Note 1: ADRES register may be read on the following T 2: See Section 9.1 for min conditions. 1999 Microchip Technology Inc. (1) 131 130 6 ...
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... PIC16C712/716 NOTES: DS41106A-page 90 Preliminary 1999 Microchip Technology Inc. ...
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... The data presented in this section is a statistical summary of data collected on units from different lots over a period of time and matrix samples. ’Typical’ represents the mean of the distribution ’Max’ or ’min’ represents (mean + (mean - 3 ) respectively, where Graphs and Tables not available at this time. 1999 Microchip Technology Inc. PIC16C712/716 is standard deviation, over the whole temperature range. Preliminary ...
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... PIC16C712/716 NOTES: DS41106A-page 92 Preliminary 1999 Microchip Technology Inc. ...
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... For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1999 Microchip Technology Inc. PIC16C712/716 Example PIC16C716-04/P 9917HAT Example Example PIC16C712 ...
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... Microchip Technology Inc. ...
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... Top to Seating Plane Top of Lead to Seating Plane Base to Seating Plane Tip to Seating Plane Package Length Package Width Radius to Radius Width Overall Row Spacing Window Width Window Length * Controlling Parameter. JEDEC equivalent: MO-036 AE 1999 Microchip Technology Inc INCHES* MIN NOM MAX 0.300 n ...
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... Preliminary A1 NOM MAX 1.27 18 2.50 2.64 1.47 1.73 0.19 0.28 11.58 11.73 7.51 7.59 10.33 10.64 0.50 0.74 0.13 0.25 0.13 0.25 0.41 0. 0.38 0.51 0.27 0.30 0.42 0. 1999 Microchip Technology Inc. ...
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... Dimensions “D” and “E” do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.” JEDEC equivalent: MO-150 AE 1999 Microchip Technology Inc. PIC16C712/716 D 2 ...
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... NOTES: 1999 Microchip Technology Inc. PIC16C712/716 Preliminary DS41106A-page 98 ...
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... Reg- isters are reset differently. 10. Wake up from SLEEP through interrupt is added. 1999 Microchip Technology Inc. PIC16C712/716 11. Two separate timers, Oscillator Start-up Timer (OST) and Power-up Timer (PWRT) are included for more reliable power-up. These tim- ers are invoked selectively to avoid unnecessary delays on power-up and wake-up ...
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... PIC16C712/716 NOTES: DS41106A-page 100 Preliminary 1999 Microchip Technology Inc. ...
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... CCPR1L Register ................................................ 11, 39 Enable (CCP1IE Bit) .................................................. 16 Flag (CCP1IF Bit) ....................................................... 17 Timer Resources ........................................................ 39 Timing Diagram .......................................................... 87 CCP1CON Register ........................................................... 39 CCP1M3:CCP1M0 Bits .............................................. 39 CCP1X:CCP1Y Bits ................................................... 39 1999 Microchip Technology Inc. PIC16C712/716 Code Protection ........................................................... 51, 65 CP1:CP0 Bits ............................................................. 52 Compare (CCP Module) .................................................... 41 Block Diagram ........................................................... 41 CCP Pin Configuration .............................................. 41 CCPR1H:CCPR1L Registers .................................... 41 Software Interrupt ...................................................... 41 Special Event Trigger ...
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... Oscillator Start-up Timer (OST) ........................... 51, 55 POR Status (POR Bit) ............................................... 18 Power Control (PCON) Register ................................ 57 Power-down (PD Bit) ........................................... 13, 54 Power-on Reset Circuit, External ............................... 55 Power-up Timer (PWRT) ..................................... 51, 55 PWRT Enable (PWRTE Bit) ...................................... 52 Time-out (TO Bit) ................................................. 13, 54 Time-out Sequence ................................................... 57 Time-out Sequence on Power-up .............................. 60 Timing Diagram ......................................................... 85 Preliminary 1999 Microchip Technology Inc. ...
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... Speed, Operating ................................................................. 1 Stack .................................................................................. 19 STATUS Register .................................................. 11, 13 Bit ........................................................................... 13 DC Bit ......................................................................... 13 IRP Bit ........................................................................ 13 PD Bit ................................................................... 13, 54 RP1:RP0 Bits ............................................................. 13 TO Bit ................................................................... 13 Bit ............................................................................ 13 1999 Microchip Technology Inc. PIC16C712/716 T T1CON Register .......................................................... 11, 31 T1CKPS1:T1CKPS0 Bits ........................................... 31 T1OSCEN Bit ............................................................ 31 T1SYNC Bit ............................................................... 31 TMR1CS Bit ............................................................... 31 TMR1ON Bit .............................................................. 31 T2CON Register .......................................................... 11, 36 T2CKPS1:T2CKPS0 Bits ........................................... 36 TMR2ON Bit ...
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... PIC16C712/716 Watchdog Timer (WDT) ............................................... 51, 63 Block Diagram ............................................................ 63 Enable (WDTE Bit) ............................................... 52, 63 Programming Considerations .................................... 63 RC Oscillator .............................................................. 63 Time-out Period ......................................................... 63 Timing Diagram .......................................................... 85 WDT Reset, Normal Operation ...................... 54, 58, 59 WDT Reset, SLEEP ....................................... 54, 58, 59 WWW, On-Line Support ....................................................... 3 DS41106A-page 104 Preliminary 1999 Microchip Technology Inc. ...
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... Trademarks: The Microchip name, logo, PIC, PICmicro, PICSTART, PICMASTER and PRO MATE are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Flex ROM, MPLAB and fuzzy- LAB are trademarks and SQTP is a service mark of Micro- chip in the U ...
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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS41106A-page 106 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS41106A Preliminary 1999 Microchip Technology Inc. ...
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... Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 1999 Microchip Technology Inc. PIC16C712/716 /XX XXX Examples: Package Pattern a) PIC16C716 - 04/P 301 = Commercial temp., PDIP package, 4 MHz, normal pattern #301. b) PIC16LC712 - 04I/SO = Industrial temp., SOIC package, 200 kHz, Extended V (2) ;V range 4.0V to 5.5V ...
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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...
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... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...