AT90PWM3-16SQ Atmel, AT90PWM3-16SQ Datasheet - Page 214

• Manufacturer Part Number: AT90PWM3-16SQ
• Description: IC AVR MCU FLASH 8K 32SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM3-16SQ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• On-chip Dac: 10 bit, 1 Channel
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOICATAVRMC200 - KIT EVAL FOR AT90PWM3 ASYNCATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATSTK520 - ADAPTER KIT FOR 90PWM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The maximum counter value is given by the following formula:
MUBRR[H:L]=F
/ (baud rate frequency)
CLKIO
MBURR[H:L] is used to calibrate the detect window of the start bit and to detect time overflow of
the other bits.
19.3.4
Double Speed Operation (U2X)
Double Speed Operation is controlled by U2X bit in UCSRA.
See “Double Speed Operation
(U2X)” on page 186.
This mode of operation is not allowed in manchester bit coding.
Each ‘bit time’ in the Manchester serial frame is divided into two phases (See
Figure
19-4). The
counter counts during the first phase and counts down during the second one. When the data bit
transition is detected, the counter memorises the N1 counter value and start counting down.
When the counter reaches the zero value, it starts counting up again and the N1/2 value allows
to open the next detection window. This detection window defines the time zone where the next
data bit edge is sampled.
AT90PWM2/3/2B/3B
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